1; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
2; Check that we constant extended instructions only when necessary.
3
4define i32 @cext_test1(i32* %a) nounwind {
5; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(r{{[0-9]+}}{{ *}}+{{ *}}##8000)
6; CHECK: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##300000)
7; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}memw(r{{[0-9]+}}{{ *}}+{{ *}}##4092)
8; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##300)
9entry:
10  %0 = load i32* %a, align 4
11  %tobool = icmp ne i32 %0, 0
12  br i1 %tobool, label %if.then, label %if.end
13
14if.then:
15  %arrayidx1 = getelementptr inbounds i32* %a, i32 2000
16  %1 = load i32* %arrayidx1, align 4
17  %add = add nsw i32 %1, 300000
18  br label %return
19
20if.end:
21  %arrayidx2 = getelementptr inbounds i32* %a, i32 1023
22  %2 = load i32* %arrayidx2, align 4
23  %add3 = add nsw i32 %2, 300
24  br label %return
25
26return:
27  %retval.0 = phi i32 [ %add, %if.then ], [ %add3, %if.end ]
28  ret i32 %retval.0
29}
30
31define i32 @cext_test2(i8* %a) nounwind {
32; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}memub(r{{[0-9]+}}+{{ *}}##1023)
33; CHECK: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##300000)
34; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memub(r{{[0-9]+}}{{ *}}+{{ *}}##1024)
35; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##6000)
36entry:
37  %tobool = icmp ne i8* %a, null
38  br i1 %tobool, label %if.then, label %if.end
39
40if.then:
41  %arrayidx = getelementptr inbounds i8* %a, i32 1023
42  %0 = load i8* %arrayidx, align 1
43  %conv = zext i8 %0 to i32
44  %add = add nsw i32 %conv, 300000
45  br label %return
46
47if.end:
48  %arrayidx1 = getelementptr inbounds i8* %a, i32 1024
49  %1 = load i8* %arrayidx1, align 1
50  %conv2 = zext i8 %1 to i32
51  %add3 = add nsw i32 %conv2, 6000
52  br label %return
53
54return:
55  %retval.0 = phi i32 [ %add, %if.then ], [ %add3, %if.end ]
56  ret i32 %retval.0
57}
58