1; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
2
3; Check that post-increment load instructions are being generated.
4; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(r{{[0-9]+}}{{ *}}++{{ *}}#4{{ *}})
5
6define i32 @sum(i32* nocapture %a, i16* nocapture %b, i32 %n) nounwind {
7entry:
8  br label %for.body
9
10for.body:
11  %lsr.iv = phi i32 [ %lsr.iv.next, %for.body ], [ 10, %entry ]
12  %arrayidx.phi = phi i32* [ %a, %entry ], [ %arrayidx.inc, %for.body ]
13  %arrayidx1.phi = phi i16* [ %b, %entry ], [ %arrayidx1.inc, %for.body ]
14  %sum.03 = phi i32 [ 0, %entry ], [ %add2, %for.body ]
15  %0 = load i32* %arrayidx.phi, align 4
16  %1 = load i16* %arrayidx1.phi, align 2
17  %conv = sext i16 %1 to i32
18  %add = add i32 %0, %sum.03
19  %add2 = add i32 %add, %conv
20  %arrayidx.inc = getelementptr i32* %arrayidx.phi, i32 1
21  %arrayidx1.inc = getelementptr i16* %arrayidx1.phi, i32 1
22  %lsr.iv.next = add i32 %lsr.iv, -1
23  %exitcond = icmp eq i32 %lsr.iv.next, 0
24  br i1 %exitcond, label %for.end, label %for.body
25
26for.end:
27  ret i32 %add2
28}
29
30