1; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s 2; Check that we are able to predicate instructions with abosolute 3; addressing mode. 4 5; CHECK: if{{ *}}(p{{[0-3]+}}.new){{ *}}memw(##gvar){{ *}}={{ *}}r{{[0-9]+}} 6 7@gvar = external global i32 8define i32 @test2(i32 %a, i32 %b) nounwind { 9entry: 10 %cmp = icmp eq i32 %a, %b 11 br i1 %cmp, label %if.then, label %if.end 12 13if.then: 14 store i32 %a, i32* @gvar, align 4 15 br label %if.end 16 17if.end: 18 ret i32 %b 19} 20