1; RUN: llc -march=mipsel -relocation-model=pic -enable-mips-tail-calls < %s | \
2; RUN: FileCheck %s -check-prefix=PIC32
3; RUN: llc -march=mipsel -relocation-model=static \
4; RUN: -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=STATIC32
5; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=+n64 -enable-mips-tail-calls \
6; RUN: < %s | FileCheck %s -check-prefix=N64
7; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic \
8; RUN: -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=PIC16
9
10@g0 = common global i32 0, align 4
11@g1 = common global i32 0, align 4
12@g2 = common global i32 0, align 4
13@g3 = common global i32 0, align 4
14@g4 = common global i32 0, align 4
15@g5 = common global i32 0, align 4
16@g6 = common global i32 0, align 4
17@g7 = common global i32 0, align 4
18@g8 = common global i32 0, align 4
19@g9 = common global i32 0, align 4
20
21define i32 @caller1(i32 %a0) nounwind {
22entry:
23; PIC32-NOT: jalr
24; STATIC32-NOT: jal
25; N64-NOT: jalr
26; PIC16: jalrc
27
28  %call = tail call i32 @callee1(i32 1, i32 1, i32 1, i32 %a0) nounwind
29  ret i32 %call
30}
31
32declare i32 @callee1(i32, i32, i32, i32)
33
34define i32 @caller2(i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind {
35entry:
36; PIC32: jalr
37; STATIC32: jal
38; N64-NOT: jalr
39; PIC16: jalrc
40
41  %call = tail call i32 @callee2(i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind
42  ret i32 %call
43}
44
45declare i32 @callee2(i32, i32, i32, i32, i32)
46
47define i32 @caller3(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4) nounwind {
48entry:
49; PIC32: jalr
50; STATIC32: jal
51; N64-NOT: jalr
52; PIC16: jalrc
53
54  %call = tail call i32 @callee3(i32 1, i32 1, i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4) nounwind
55  ret i32 %call
56}
57
58declare i32 @callee3(i32, i32, i32, i32, i32, i32, i32, i32)
59
60define i32 @caller4(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind {
61entry:
62; PIC32: jalr
63; STATIC32: jal
64; N64: jalr
65; PIC16: jalrc
66
67  %call = tail call i32 @callee4(i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind
68  ret i32 %call
69}
70
71declare i32 @callee4(i32, i32, i32, i32, i32, i32, i32, i32, i32)
72
73define i32 @caller5() nounwind readonly {
74entry:
75; PIC32: .ent caller5
76; PIC32-NOT: jalr
77; PIC32: .end caller5
78; STATIC32: .ent caller5
79; STATIC32-NOT: jal
80; STATIC32: .end caller5
81; N64: .ent caller5
82; N64-NOT: jalr
83; N64: .end caller5
84; PIC16: .ent caller5
85; PIC16: jalrc
86; PIC16: .end caller5
87
88  %0 = load i32* @g0, align 4
89  %1 = load i32* @g1, align 4
90  %2 = load i32* @g2, align 4
91  %3 = load i32* @g3, align 4
92  %4 = load i32* @g4, align 4
93  %5 = load i32* @g5, align 4
94  %6 = load i32* @g6, align 4
95  %7 = load i32* @g7, align 4
96  %8 = load i32* @g8, align 4
97  %9 = load i32* @g9, align 4
98  %call = tail call fastcc i32 @callee5(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9)
99  ret i32 %call
100}
101
102define internal fastcc i32 @callee5(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8, i32 %a9) nounwind readnone noinline {
103entry:
104  %add = add nsw i32 %a1, %a0
105  %add1 = add nsw i32 %add, %a2
106  %add2 = add nsw i32 %add1, %a3
107  %add3 = add nsw i32 %add2, %a4
108  %add4 = add nsw i32 %add3, %a5
109  %add5 = add nsw i32 %add4, %a6
110  %add6 = add nsw i32 %add5, %a7
111  %add7 = add nsw i32 %add6, %a8
112  %add8 = add nsw i32 %add7, %a9
113  ret i32 %add8
114}
115
116declare i32 @callee8(i32, ...)
117
118define i32 @caller8_0() nounwind {
119entry:
120  %call = tail call fastcc i32 @caller8_1()
121  ret i32 %call
122}
123
124define internal fastcc i32 @caller8_1() nounwind noinline {
125entry:
126; PIC32: .ent caller8_1
127; PIC32: jalr
128; PIC32: .end caller8_1
129; STATIC32: .ent caller8_1
130; STATIC32: jal
131; STATIC32: .end caller8_1
132; N64: .ent caller8_1
133; N64-NOT: jalr
134; N64: .end caller8_1
135; PIC16: .ent caller8_1
136; PIC16: jalrc
137; PIC16: .end caller8_1
138
139  %call = tail call i32 (i32, ...)* @callee8(i32 2, i32 1) nounwind
140  ret i32 %call
141}
142
143%struct.S = type { [2 x i32] }
144
145@gs1 = external global %struct.S
146
147declare i32 @callee9(%struct.S* byval)
148
149define i32 @caller9_0() nounwind {
150entry:
151  %call = tail call fastcc i32 @caller9_1()
152  ret i32 %call
153}
154
155define internal fastcc i32 @caller9_1() nounwind noinline {
156entry:
157; PIC32: .ent caller9_1
158; PIC32: jalr
159; PIC32: .end caller9_1
160; STATIC32: .ent caller9_1
161; STATIC32: jal
162; STATIC32: .end caller9_1
163; N64: .ent caller9_1
164; N64: jalr
165; N64: .end caller9_1
166; PIC16: .ent caller9_1
167; PIC16: jalrc
168; PIC16: .end caller9_1
169
170  %call = tail call i32 @callee9(%struct.S* byval @gs1) nounwind
171  ret i32 %call
172}
173
174declare i32 @callee10(i32, i32, i32, i32, i32, i32, i32, i32, i32)
175
176define i32 @caller10(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8) nounwind {
177entry:
178; PIC32: .ent caller10
179; PIC32-NOT: jalr
180; STATIC32: .ent caller10
181; STATIC32-NOT: jal
182; N64: .ent caller10
183; N64-NOT: jalr
184; PIC16: .ent caller10
185; PIC16: jalrc
186
187  %call = tail call i32 @callee10(i32 %a8, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind
188  ret i32 %call
189}
190
191declare i32 @callee11(%struct.S* byval)
192
193define i32 @caller11() nounwind noinline {
194entry:
195; PIC32: .ent caller11
196; PIC32: jalr
197; STATIC32: .ent caller11
198; STATIC32: jal
199; N64: .ent caller11
200; N64: jalr
201; PIC16: .ent caller11
202; PIC16: jalrc
203
204  %call = tail call i32 @callee11(%struct.S* byval @gs1) nounwind
205  ret i32 %call
206}
207
208declare i32 @callee12()
209
210declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
211
212define i32 @caller12(%struct.S* nocapture byval %a0) nounwind {
213entry:
214; PIC32: .ent caller12
215; PIC32: jalr
216; STATIC32: .ent caller12
217; STATIC32: jal
218; N64: .ent caller12
219; N64: jalr
220; PIC16: .ent caller12
221; PIC16: jalrc
222
223  %0 = bitcast %struct.S* %a0 to i8*
224  tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast (%struct.S* @gs1 to i8*), i8* %0, i32 8, i32 4, i1 false)
225  %call = tail call i32 @callee12() nounwind
226  ret i32 %call
227}
228
229declare i32 @callee13(i32, ...)
230
231define i32 @caller13() nounwind {
232entry:
233; PIC32: .ent caller13
234; PIC32-NOT: jalr
235; STATIC32: .ent caller13
236; STATIC32-NOT: jal
237; N64: .ent caller13
238; N64-NOT: jalr
239; PIC16: .ent caller13
240; PIC16: jalrc
241
242  %call = tail call i32 (i32, ...)* @callee13(i32 1, i32 2) nounwind
243  ret i32 %call
244}
245
246; Check that there is a chain edge between the load and store nodes.
247;
248; PIC32-LABEL: caller14:
249; PIC32: lw ${{[0-9]+}}, 16($sp)
250; PIC32: sw $4, 16($sp)
251
252define void @caller14(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
253entry:
254  tail call void @callee14(i32 %e, i32 %b, i32 %c, i32 %d, i32 %a)
255  ret void
256}
257
258declare void @callee14(i32, i32, i32, i32, i32)
259