1; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck %s 2; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 3target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 4target triple = "powerpc64-unknown-linux-gnu" 5 6define i64 @foo(float %a) nounwind { 7 %x = fptosi float %a to i64 8 ret i64 %x 9 10; CHECK: @foo 11; CHECK: fctidz [[REG:[0-9]+]], 1 12; CHECK: stfd [[REG]], 13; CHECK: ld 3, 14; CHECK: blr 15} 16 17define i64 @foo2(double %a) nounwind { 18 %x = fptosi double %a to i64 19 ret i64 %x 20 21; CHECK: @foo2 22; CHECK: fctidz [[REG:[0-9]+]], 1 23; CHECK: stfd [[REG]], 24; CHECK: ld 3, 25; CHECK: blr 26} 27 28define i64 @foo3(float %a) nounwind { 29 %x = fptoui float %a to i64 30 ret i64 %x 31 32; CHECK: @foo3 33; CHECK: fctiduz [[REG:[0-9]+]], 1 34; CHECK: stfd [[REG]], 35; CHECK: ld 3, 36; CHECK: blr 37} 38 39define i64 @foo4(double %a) nounwind { 40 %x = fptoui double %a to i64 41 ret i64 %x 42 43; CHECK: @foo4 44; CHECK: fctiduz [[REG:[0-9]+]], 1 45; CHECK: stfd [[REG]], 46; CHECK: ld 3, 47; CHECK: blr 48} 49 50define i32 @goo(float %a) nounwind { 51 %x = fptosi float %a to i32 52 ret i32 %x 53 54; CHECK: @goo 55; CHECK: fctiwz [[REG:[0-9]+]], 1 56; CHECK: stfiwx [[REG]], 57; CHECK: lwz 3, 58; CHECK: blr 59} 60 61define i32 @goo2(double %a) nounwind { 62 %x = fptosi double %a to i32 63 ret i32 %x 64 65; CHECK: @goo2 66; CHECK: fctiwz [[REG:[0-9]+]], 1 67; CHECK: stfiwx [[REG]], 68; CHECK: lwz 3, 69; CHECK: blr 70} 71 72define i32 @goo3(float %a) nounwind { 73 %x = fptoui float %a to i32 74 ret i32 %x 75 76; CHECK: @goo3 77; CHECK: fctiwuz [[REG:[0-9]+]], 1 78; CHECK: stfiwx [[REG]], 79; CHECK: lwz 3, 80; CHECK: blr 81} 82 83define i32 @goo4(double %a) nounwind { 84 %x = fptoui double %a to i32 85 ret i32 %x 86 87; CHECK: @goo4 88; CHECK: fctiwuz [[REG:[0-9]+]], 1 89; CHECK: stfiwx [[REG]], 90; CHECK: lwz 3, 91; CHECK: blr 92} 93 94