1; RUN: llc -mcpu=pwr7 -O0 -code-model=medium -fast-isel=false -mattr=-vsx <%s | FileCheck -check-prefix=MEDIUM %s
2; RUN: llc -mcpu=pwr7 -O0 -code-model=medium -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=MEDIUM-VSX %s
3; RUN: llc -mcpu=pwr7 -O0 -code-model=large -fast-isel=false -mattr=-vsx <%s | FileCheck -check-prefix=LARGE %s
4; RUN: llc -mcpu=pwr7 -O0 -code-model=large -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=LARGE-VSX %s
5
6; Test correct code generation for medium and large code model
7; for loading a value from the constant pool (TOC-relative).
8
9target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
10target triple = "powerpc64-unknown-linux-gnu"
11
12define double @test_double_const() nounwind {
13entry:
14  ret double 0x3F4FD4920B498CF0
15}
16
17; MEDIUM: [[VAR:[a-z0-9A-Z_.]+]]:
18; MEDIUM: .quad 4562098671269285104
19; MEDIUM-LABEL: test_double_const:
20; MEDIUM: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
21; MEDIUM: addi [[REG2:[0-9]+]], [[REG1]], [[VAR]]@toc@l
22; MEDIUM: lfd {{[0-9]+}}, 0([[REG2]])
23
24; MEDIUM-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
25; MEDIUM-VSX: .quad 4562098671269285104
26; MEDIUM-VSX-LABEL: test_double_const:
27; MEDIUM-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
28; MEDIUM-VSX: addi [[REG2:[0-9]+]], [[REG1]], [[VAR]]@toc@l
29; MEDIUM-VSX: lxsdx {{[0-9]+}}, 0, [[REG2]]
30
31; LARGE: [[VAR:[a-z0-9A-Z_.]+]]:
32; LARGE: .quad 4562098671269285104
33; LARGE-LABEL: test_double_const:
34; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
35; LARGE: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]])
36; LARGE: lfd {{[0-9]+}}, 0([[REG2]])
37
38; LARGE-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
39; LARGE-VSX: .quad 4562098671269285104
40; LARGE-VSX-LABEL: test_double_const:
41; LARGE-VSX: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
42; LARGE-VSX: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]])
43; LARGE-VSX: lxsdx {{[0-9]+}}, 0, [[REG2]]
44