1; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
2target datalayout = "E-m:e-i64:64-n32:64"
3target triple = "powerpc64-unknown-linux-gnu"
4
5%"class.llvm::MachineOperand" = type { i8, [3 x i8], i64, i64*, i64 }
6
7; Function Attrs: nounwind
8define void @_ZN4llvm17ScheduleDAGInstrs14addPhysRegDepsEPNS_5SUnitEj() #0 align 2 {
9
10; If we were able to split out the indexing, the load with update should be
11; removed (resulting in a nearly-empty output).
12; CHECK-LABEL: @_ZN4llvm17ScheduleDAGInstrs14addPhysRegDepsEPNS_5SUnitEj
13; CHECK-NOT: lhzu
14
15entry:
16  %0 = load %"class.llvm::MachineOperand"** undef, align 8
17  br i1 undef, label %_ZNK4llvm14MachineOperand6getRegEv.exit, label %cond.false.i123
18
19cond.false.i123:                                  ; preds = %_ZN4llvm12MachineInstr10getOperandEj.exit
20  unreachable
21
22_ZNK4llvm14MachineOperand6getRegEv.exit:          ; preds = %_ZN4llvm12MachineInstr10getOperandEj.exit
23  %IsDef.i = getelementptr inbounds %"class.llvm::MachineOperand"* %0, i64 undef, i32 1
24  %1 = bitcast [3 x i8]* %IsDef.i to i24*
25  %bf.load.i = load i24* %1, align 1
26  %2 = and i24 %bf.load.i, 128
27  br i1 undef, label %for.cond.cleanup, label %for.body.lr.ph
28
29for.body.lr.ph:                                   ; preds = %_ZNK4llvm14MachineOperand6getRegEv.exit
30  %3 = zext i24 %2 to i32
31  br i1 undef, label %cond.false.i134, label %_ZNK4llvm18MCRegAliasIteratordeEv.exit
32
33for.cond.cleanup:                                 ; preds = %_ZNK4llvm14MachineOperand6getRegEv.exit
34  br i1 undef, label %_ZNK4llvm14MachineOperand5isDefEv.exit, label %cond.false.i129
35
36cond.false.i129:                                  ; preds = %for.cond.cleanup
37  unreachable
38
39_ZNK4llvm14MachineOperand5isDefEv.exit:           ; preds = %for.cond.cleanup
40  br i1 undef, label %_ZNK4llvm14MachineOperand6getRegEv.exit247, label %cond.false.i244
41
42cond.false.i134:                                  ; preds = %for.body.lr.ph
43  unreachable
44
45_ZNK4llvm18MCRegAliasIteratordeEv.exit:           ; preds = %for.body.lr.ph
46  unreachable
47
48cond.false.i244:                                  ; preds = %_ZNK4llvm14MachineOperand5isDefEv.exit
49  unreachable
50
51_ZNK4llvm14MachineOperand6getRegEv.exit247:       ; preds = %_ZNK4llvm14MachineOperand5isDefEv.exit
52  br i1 undef, label %if.then53, label %if.end55
53
54if.then53:                                        ; preds = %_ZNK4llvm14MachineOperand6getRegEv.exit247
55  unreachable
56
57if.end55:                                         ; preds = %_ZNK4llvm14MachineOperand6getRegEv.exit247
58  br i1 undef, label %_ZNK4llvm14MachineOperand6isDeadEv.exit262, label %cond.false.i257
59
60cond.false.i257:                                  ; preds = %if.end55
61  unreachable
62
63_ZNK4llvm14MachineOperand6isDeadEv.exit262:       ; preds = %if.end55
64  %bf.load.i259 = load i24* %1, align 1
65  br i1 undef, label %if.then57, label %if.else59
66
67if.then57:                                        ; preds = %_ZNK4llvm14MachineOperand6isDeadEv.exit262
68  unreachable
69
70if.else59:                                        ; preds = %_ZNK4llvm14MachineOperand6isDeadEv.exit262
71  br i1 undef, label %if.end89, label %if.then62
72
73if.then62:                                        ; preds = %if.else59
74  unreachable
75
76if.end89:                                         ; preds = %if.else59
77  unreachable
78}
79
80attributes #0 = { nounwind }
81
82
83