1; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck -check-prefix=SI %s
2
3
4@lds = addrspace(3) global [512 x float] undef, align 4
5
6
7; SI-LABEL: @simple_write2st64_one_val_f32_0_1
8; SI-DAG: buffer_load_dword [[VAL:v[0-9]+]]
9; SI-DAG: v_lshlrev_b32_e32 [[VPTR:v[0-9]+]], 2, v{{[0-9]+}}
10; SI: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset0:0 offset1:1 [M0]
11; SI: s_endpgm
12define void @simple_write2st64_one_val_f32_0_1(float addrspace(1)* %C, float addrspace(1)* %in) #0 {
13  %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
14  %in.gep = getelementptr float addrspace(1)* %in, i32 %x.i
15  %val = load float addrspace(1)* %in.gep, align 4
16  %arrayidx0 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %x.i
17  store float %val, float addrspace(3)* %arrayidx0, align 4
18  %add.x = add nsw i32 %x.i, 64
19  %arrayidx1 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %add.x
20  store float %val, float addrspace(3)* %arrayidx1, align 4
21  ret void
22}
23
24; SI-LABEL: @simple_write2st64_two_val_f32_2_5
25; SI-DAG: buffer_load_dword [[VAL0:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
26; SI-DAG: buffer_load_dword [[VAL1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
27; SI-DAG: v_lshlrev_b32_e32 [[VPTR:v[0-9]+]], 2, v{{[0-9]+}}
28; SI: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 [M0]
29; SI: s_endpgm
30define void @simple_write2st64_two_val_f32_2_5(float addrspace(1)* %C, float addrspace(1)* %in) #0 {
31  %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
32  %in.gep.0 = getelementptr float addrspace(1)* %in, i32 %x.i
33  %in.gep.1 = getelementptr float addrspace(1)* %in.gep.0, i32 1
34  %val0 = load float addrspace(1)* %in.gep.0, align 4
35  %val1 = load float addrspace(1)* %in.gep.1, align 4
36  %add.x.0 = add nsw i32 %x.i, 128
37  %arrayidx0 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %add.x.0
38  store float %val0, float addrspace(3)* %arrayidx0, align 4
39  %add.x.1 = add nsw i32 %x.i, 320
40  %arrayidx1 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %add.x.1
41  store float %val1, float addrspace(3)* %arrayidx1, align 4
42  ret void
43}
44
45; SI-LABEL: @simple_write2st64_two_val_max_offset_f32
46; SI-DAG: buffer_load_dword [[VAL0:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
47; SI-DAG: buffer_load_dword [[VAL1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
48; SI-DAG: v_lshlrev_b32_e32 [[VPTR:v[0-9]+]], 2, v{{[0-9]+}}
49; SI: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:0 offset1:255 [M0]
50; SI: s_endpgm
51define void @simple_write2st64_two_val_max_offset_f32(float addrspace(1)* %C, float addrspace(1)* %in, float addrspace(3)* %lds) #0 {
52  %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
53  %in.gep.0 = getelementptr float addrspace(1)* %in, i32 %x.i
54  %in.gep.1 = getelementptr float addrspace(1)* %in.gep.0, i32 1
55  %val0 = load float addrspace(1)* %in.gep.0, align 4
56  %val1 = load float addrspace(1)* %in.gep.1, align 4
57  %arrayidx0 = getelementptr inbounds float addrspace(3)* %lds, i32 %x.i
58  store float %val0, float addrspace(3)* %arrayidx0, align 4
59  %add.x = add nsw i32 %x.i, 16320
60  %arrayidx1 = getelementptr inbounds float addrspace(3)* %lds, i32 %add.x
61  store float %val1, float addrspace(3)* %arrayidx1, align 4
62  ret void
63}
64
65; SI-LABEL: @simple_write2st64_two_val_max_offset_f64
66; SI-DAG: buffer_load_dwordx2 [[VAL0:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
67; SI-DAG: buffer_load_dwordx2 [[VAL1:v\[[0-9]+:[0-9]+\]]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:8
68; SI-DAG: v_add_i32_e32 [[VPTR:v[0-9]+]],
69; SI: ds_write2st64_b64 [[VPTR]], [[VAL0]], [[VAL1]] offset0:4 offset1:127 [M0]
70; SI: s_endpgm
71define void @simple_write2st64_two_val_max_offset_f64(double addrspace(1)* %C, double addrspace(1)* %in, double addrspace(3)* %lds) #0 {
72  %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
73  %in.gep.0 = getelementptr double addrspace(1)* %in, i32 %x.i
74  %in.gep.1 = getelementptr double addrspace(1)* %in.gep.0, i32 1
75  %val0 = load double addrspace(1)* %in.gep.0, align 8
76  %val1 = load double addrspace(1)* %in.gep.1, align 8
77  %add.x.0 = add nsw i32 %x.i, 256
78  %arrayidx0 = getelementptr inbounds double addrspace(3)* %lds, i32 %add.x.0
79  store double %val0, double addrspace(3)* %arrayidx0, align 8
80  %add.x.1 = add nsw i32 %x.i, 8128
81  %arrayidx1 = getelementptr inbounds double addrspace(3)* %lds, i32 %add.x.1
82  store double %val1, double addrspace(3)* %arrayidx1, align 8
83  ret void
84}
85
86; SI-LABEL: @byte_size_only_divisible_64_write2st64_f64
87; SI-NOT: ds_write2st64_b64
88; SI: ds_write2_b64 {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}} offset0:0 offset1:8
89; SI: s_endpgm
90define void @byte_size_only_divisible_64_write2st64_f64(double addrspace(1)* %C, double addrspace(1)* %in, double addrspace(3)* %lds) #0 {
91  %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
92  %in.gep = getelementptr double addrspace(1)* %in, i32 %x.i
93  %val = load double addrspace(1)* %in.gep, align 8
94  %arrayidx0 = getelementptr inbounds double addrspace(3)* %lds, i32 %x.i
95  store double %val, double addrspace(3)* %arrayidx0, align 8
96  %add.x = add nsw i32 %x.i, 8
97  %arrayidx1 = getelementptr inbounds double addrspace(3)* %lds, i32 %add.x
98  store double %val, double addrspace(3)* %arrayidx1, align 8
99  ret void
100}
101
102; Function Attrs: nounwind readnone
103declare i32 @llvm.r600.read.tgid.x() #1
104
105; Function Attrs: nounwind readnone
106declare i32 @llvm.r600.read.tgid.y() #1
107
108; Function Attrs: nounwind readnone
109declare i32 @llvm.r600.read.tidig.x() #1
110
111; Function Attrs: nounwind readnone
112declare i32 @llvm.r600.read.tidig.y() #1
113
114; Function Attrs: noduplicate nounwind
115declare void @llvm.AMDGPU.barrier.local() #2
116
117attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
118attributes #1 = { nounwind readnone }
119attributes #2 = { noduplicate nounwind }
120