1; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
2; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
3
4; These tests check that fdiv is expanded correctly and also test that the
5; scheduler is scheduling the RECIP_IEEE and MUL_IEEE instructions in separate
6; instruction groups.
7
8; R600-CHECK: @fdiv_v2f32
9; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Z
10; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Y
11; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[3].X, PS
12; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].W, PS
13; SI-CHECK: @fdiv_v2f32
14; SI-CHECK-DAG: V_RCP_F32
15; SI-CHECK-DAG: V_MUL_F32
16; SI-CHECK-DAG: V_RCP_F32
17; SI-CHECK-DAG: V_MUL_F32
18define void @fdiv_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) {
19entry:
20  %0 = fdiv <2 x float> %a, %b
21  store <2 x float> %0, <2 x float> addrspace(1)* %out
22  ret void
23}
24
25; R600-CHECK: @fdiv_v4f32
26; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
27; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
28; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
29; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
30; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, PS
31; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, PS
32; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, PS
33; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, PS
34; SI-CHECK: @fdiv_v4f32
35; SI-CHECK-DAG: V_RCP_F32
36; SI-CHECK-DAG: V_MUL_F32
37; SI-CHECK-DAG: V_RCP_F32
38; SI-CHECK-DAG: V_MUL_F32
39; SI-CHECK-DAG: V_RCP_F32
40; SI-CHECK-DAG: V_MUL_F32
41; SI-CHECK-DAG: V_RCP_F32
42; SI-CHECK-DAG: V_MUL_F32
43define void @fdiv_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
44  %b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1
45  %a = load <4 x float> addrspace(1) * %in
46  %b = load <4 x float> addrspace(1) * %b_ptr
47  %result = fdiv <4 x float> %a, %b
48  store <4 x float> %result, <4 x float> addrspace(1)* %out
49  ret void
50}
51