1;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s 2 3;CHECK: LOG_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 4;CHECK: MUL NON-IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], PS}} 5;CHECK-NEXT: EXP_IEEE * T{{[0-9]+\.[XYZW], PV\.[XYZW]}} 6 7define void @test(<4 x float> inreg %reg0) #0 { 8 %r0 = extractelement <4 x float> %reg0, i32 0 9 %r1 = extractelement <4 x float> %reg0, i32 1 10 %r2 = call float @llvm.pow.f32( float %r0, float %r1) 11 %vec = insertelement <4 x float> undef, float %r2, i32 0 12 call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0) 13 ret void 14} 15 16declare float @llvm.pow.f32(float ,float ) readonly 17declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) 18 19attributes #0 = { "ShaderType"="0" } 20