1; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
2; RUN: llc < %s -march=r600 --mcpu=SI | FileCheck %s --check-prefix=SI-CHECK
3
4; R600-CHECK-LABEL: @sqrt_f32
5; R600-CHECK: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z
6; R600-CHECK: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].Z, PS
7; SI-CHECK-LABEL: @sqrt_f32
8; SI-CHECK: V_SQRT_F32_e32
9define void @sqrt_f32(float addrspace(1)* %out, float %in) {
10entry:
11  %0 = call float @llvm.sqrt.f32(float %in)
12  store float %0, float addrspace(1)* %out
13  ret void
14}
15
16; R600-CHECK-LABEL: @sqrt_v2f32
17; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].W
18; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].W, PS
19; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].X
20; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].X, PS
21; SI-CHECK-LABEL: @sqrt_v2f32
22; SI-CHECK: V_SQRT_F32_e32
23; SI-CHECK: V_SQRT_F32_e32
24define void @sqrt_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
25entry:
26  %0 = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
27  store <2 x float> %0, <2 x float> addrspace(1)* %out
28  ret void
29}
30
31; R600-CHECK-LABEL: @sqrt_v4f32
32; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Y
33; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Y, PS
34; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Z
35; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Z, PS
36; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].W
37; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].W, PS
38; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[4].X
39; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[4].X, PS
40; SI-CHECK-LABEL: @sqrt_v4f32
41; SI-CHECK: V_SQRT_F32_e32
42; SI-CHECK: V_SQRT_F32_e32
43; SI-CHECK: V_SQRT_F32_e32
44; SI-CHECK: V_SQRT_F32_e32
45define void @sqrt_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
46entry:
47  %0 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %in)
48  store <4 x float> %0, <4 x float> addrspace(1)* %out
49  ret void
50}
51
52declare float @llvm.sqrt.f32(float %in)
53declare <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
54declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %in)
55