1; Function Attrs: nounwind
2; RUN: llc < %s -march=r600 -mcpu=redwood  | FileCheck %s
3;
4; CFG flattening should use parallel-or to generate branch conditions and
5; then merge if-regions with the same bodies.
6;
7; CHECK: OR_INT
8; CHECK-NEXT: OR_INT
9; CHECK-NEXT: OR_INT
10define void @_Z9chk1D_512v() #0 {
11entry:
12  %a0 = alloca i32, align 4
13  %b0 = alloca i32, align 4
14  %c0 = alloca i32, align 4
15  %d0 = alloca i32, align 4
16  %a1 = alloca i32, align 4
17  %b1 = alloca i32, align 4
18  %c1 = alloca i32, align 4
19  %d1 = alloca i32, align 4
20  %data = alloca i32, align 4
21  %0 = load i32* %a0, align 4
22  %1 = load i32* %b0, align 4
23  %cmp = icmp ne i32 %0, %1
24  br i1 %cmp, label %land.lhs.true, label %if.else
25
26land.lhs.true:                                    ; preds = %entry
27  %2 = load i32* %c0, align 4
28  %3 = load i32* %d0, align 4
29  %cmp1 = icmp ne i32 %2, %3
30  br i1 %cmp1, label %if.then, label %if.else
31
32if.then:                                          ; preds = %land.lhs.true
33  br label %if.end
34
35if.else:                                          ; preds = %land.lhs.true, %entry
36  store i32 1, i32* %data, align 4
37  br label %if.end
38
39if.end:                                           ; preds = %if.else, %if.then
40  %4 = load i32* %a1, align 4
41  %5 = load i32* %b1, align 4
42  %cmp2 = icmp ne i32 %4, %5
43  br i1 %cmp2, label %land.lhs.true3, label %if.else6
44
45land.lhs.true3:                                   ; preds = %if.end
46  %6 = load i32* %c1, align 4
47  %7 = load i32* %d1, align 4
48  %cmp4 = icmp ne i32 %6, %7
49  br i1 %cmp4, label %if.then5, label %if.else6
50
51if.then5:                                         ; preds = %land.lhs.true3
52  br label %if.end7
53
54if.else6:                                         ; preds = %land.lhs.true3, %if.end
55  store i32 1, i32* %data, align 4
56  br label %if.end7
57
58if.end7:                                          ; preds = %if.else6, %if.then5
59  ret void
60}
61
62