1; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
4
5; The code generated by sdiv is long and complex and may frequently change.
6; The goal of this test is to make sure the ISel doesn't fail.
7;
8; This program was previously failing to compile when one of the selectcc
9; opcodes generated by the sdiv lowering was being legalized and optimized to:
10; selectcc Remainder -1, 0, -1, SETGT
11; This was fixed by adding an additional pattern in R600Instructions.td to
12; match this pattern with a CNDGE_INT.
13
14; FUNC-LABEL: {{^}}sdiv_i32:
15; EG: CF_END
16define void @sdiv_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
17  %den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
18  %num = load i32 addrspace(1) * %in
19  %den = load i32 addrspace(1) * %den_ptr
20  %result = sdiv i32 %num, %den
21  store i32 %result, i32 addrspace(1)* %out
22  ret void
23}
24
25; FUNC-LABEL: {{^}}sdiv_i32_4:
26define void @sdiv_i32_4(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
27  %num = load i32 addrspace(1) * %in
28  %result = sdiv i32 %num, 4
29  store i32 %result, i32 addrspace(1)* %out
30  ret void
31}
32
33; Multiply by a weird constant to make sure setIntDivIsCheap is
34; working.
35
36; FUNC-LABEL: {{^}}slow_sdiv_i32_3435:
37; SI: buffer_load_dword [[VAL:v[0-9]+]],
38; SI: v_mov_b32_e32 [[MAGIC:v[0-9]+]], 0x98a1930b
39; SI: v_mul_hi_i32 [[TMP:v[0-9]+]], [[MAGIC]], [[VAL]]
40; SI: v_add_i32
41; SI: v_lshrrev_b32
42; SI: v_ashrrev_i32
43; SI: v_add_i32
44; SI: buffer_store_dword
45; SI: s_endpgm
46define void @slow_sdiv_i32_3435(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
47  %num = load i32 addrspace(1) * %in
48  %result = sdiv i32 %num, 3435
49  store i32 %result, i32 addrspace(1)* %out
50  ret void
51}
52
53define void @sdiv_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
54  %den_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
55  %num = load <2 x i32> addrspace(1) * %in
56  %den = load <2 x i32> addrspace(1) * %den_ptr
57  %result = sdiv <2 x i32> %num, %den
58  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
59  ret void
60}
61
62define void @sdiv_v2i32_4(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
63  %num = load <2 x i32> addrspace(1) * %in
64  %result = sdiv <2 x i32> %num, <i32 4, i32 4>
65  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
66  ret void
67}
68
69define void @sdiv_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
70  %den_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
71  %num = load <4 x i32> addrspace(1) * %in
72  %den = load <4 x i32> addrspace(1) * %den_ptr
73  %result = sdiv <4 x i32> %num, %den
74  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
75  ret void
76}
77
78define void @sdiv_v4i32_4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
79  %num = load <4 x i32> addrspace(1) * %in
80  %result = sdiv <4 x i32> %num, <i32 4, i32 4, i32 4, i32 4>
81  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
82  ret void
83}
84
85; Tests for 64-bit divide bypass.
86; define void @test_get_quotient(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
87;   %result = sdiv i64 %a, %b
88;   store i64 %result, i64 addrspace(1)* %out, align 8
89;   ret void
90; }
91
92; define void @test_get_remainder(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
93;   %result = srem i64 %a, %b
94;   store i64 %result, i64 addrspace(1)* %out, align 8
95;   ret void
96; }
97
98; define void @test_get_quotient_and_remainder(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
99;   %resultdiv = sdiv i64 %a, %b
100;   %resultrem = srem i64 %a, %b
101;   %result = add i64 %resultdiv, %resultrem
102;   store i64 %result, i64 addrspace(1)* %out, align 8
103;   ret void
104; }
105