1; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
2target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
3
4define i32 @test(i32 %n) nounwind {
5; CHECK-LABEL: test:
6; CHECK-NOT: mov
7; CHECK: return
8entry:
9  %0 = icmp eq i32 %n, 1                          ; <i1> [#uses=1]
10  br i1 %0, label %return, label %bb.nph
11
12bb.nph:                                           ; preds = %entry
13  %tmp = add i32 %n, -1                           ; <i32> [#uses=1]
14  br label %bb
15
16bb:                                               ; preds = %bb.nph, %bb
17  %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=1]
18  %u.05 = phi i64 [ undef, %bb.nph ], [ %ins, %bb ] ; <i64> [#uses=1]
19  %1 = tail call  i32 @f() nounwind    ; <i32> [#uses=1]
20  %tmp4 = zext i32 %1 to i64                      ; <i64> [#uses=1]
21  %mask = and i64 %u.05, -4294967296              ; <i64> [#uses=1]
22  %ins = or i64 %tmp4, %mask                      ; <i64> [#uses=2]
23  tail call  void @g(i64 %ins) nounwind
24  %indvar.next = add i32 %indvar, 1               ; <i32> [#uses=2]
25  %exitcond = icmp eq i32 %indvar.next, %tmp      ; <i1> [#uses=1]
26  br i1 %exitcond, label %return, label %bb
27
28return:                                           ; preds = %bb, %entry
29  ret i32 undef
30}
31
32define i32 @test_dead_cycle(i32 %n) nounwind {
33; CHECK-LABEL: test_dead_cycle:
34; CHECK: blx
35; CHECK-NOT: mov
36; CHECK: blx
37entry:
38  %0 = icmp eq i32 %n, 1                          ; <i1> [#uses=1]
39  br i1 %0, label %return, label %bb.nph
40
41bb.nph:                                           ; preds = %entry
42  %tmp = add i32 %n, -1                           ; <i32> [#uses=2]
43  br label %bb
44
45bb:                                               ; preds = %bb.nph, %bb2
46  %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb2 ] ; <i32> [#uses=2]
47  %u.17 = phi i64 [ undef, %bb.nph ], [ %u.0, %bb2 ] ; <i64> [#uses=2]
48  %tmp9 = sub i32 %tmp, %indvar                   ; <i32> [#uses=1]
49  %1 = icmp sgt i32 %tmp9, 1                      ; <i1> [#uses=1]
50  br i1 %1, label %bb1, label %bb2
51
52bb1:                                              ; preds = %bb
53  %2 = tail call  i32 @f() nounwind    ; <i32> [#uses=1]
54  %tmp6 = zext i32 %2 to i64                      ; <i64> [#uses=1]
55  %mask = and i64 %u.17, -4294967296              ; <i64> [#uses=1]
56  %ins = or i64 %tmp6, %mask                      ; <i64> [#uses=1]
57  tail call  void @g(i64 %ins) nounwind
58  br label %bb2
59
60bb2:                                              ; preds = %bb1, %bb
61; also check for duplicate induction variables (radar 7645034)
62; CHECK: subs r{{.*}}, #1
63; CHECK-NOT: subs r{{.*}}, #1
64; CHECK: pop
65  %u.0 = phi i64 [ %ins, %bb1 ], [ %u.17, %bb ]   ; <i64> [#uses=2]
66  %indvar.next = add i32 %indvar, 1               ; <i32> [#uses=2]
67  %exitcond = icmp eq i32 %indvar.next, %tmp      ; <i1> [#uses=1]
68  br i1 %exitcond, label %return, label %bb
69
70return:                                           ; preds = %bb2, %entry
71  ret i32 undef
72}
73
74declare i32 @f()
75
76declare void @g(i64)
77