1; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
2
3; These tests would be improved by 'movs r0, #0' being rematerialized below the
4; test as 'mov.w r0, #0'.
5
6define i1 @f1(i32 %a, i32 %b) {
7; CHECK-LABEL: f1:
8; CHECK: cmp {{.*}}, r1
9    %tmp = icmp ne i32 %a, %b
10    ret i1 %tmp
11}
12
13define i1 @f2(i32 %a, i32 %b) {
14; CHECK-LABEL: f2:
15; CHECK: cmp {{.*}}, r1
16    %tmp = icmp eq i32 %a, %b
17    ret i1 %tmp
18}
19
20define i1 @f6(i32 %a, i32 %b) {
21; CHECK-LABEL: f6:
22; CHECK: cmp.w {{.*}}, r1, lsl #5
23    %tmp = shl i32 %b, 5
24    %tmp1 = icmp eq i32 %tmp, %a
25    ret i1 %tmp1
26}
27
28define i1 @f7(i32 %a, i32 %b) {
29; CHECK-LABEL: f7:
30; CHECK: cmp.w {{.*}}, r1, lsr #6
31    %tmp = lshr i32 %b, 6
32    %tmp1 = icmp ne i32 %tmp, %a
33    ret i1 %tmp1
34}
35
36define i1 @f8(i32 %a, i32 %b) {
37; CHECK-LABEL: f8:
38; CHECK: cmp.w {{.*}}, r1, asr #7
39    %tmp = ashr i32 %b, 7
40    %tmp1 = icmp eq i32 %a, %tmp
41    ret i1 %tmp1
42}
43
44define i1 @f9(i32 %a, i32 %b) {
45; CHECK-LABEL: f9:
46; CHECK: cmp.w {{.*}}, {{.*}}, ror #8
47    %l8 = shl i32 %a, 24
48    %r8 = lshr i32 %a, 8
49    %tmp = or i32 %l8, %r8
50    %tmp1 = icmp ne i32 %a, %tmp
51    ret i1 %tmp1
52}
53