1; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s
2
3; CHECK: inc
4; CHECK-NOT: PTR
5; CHECK: {{$}}
6
7define signext   i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) {
8entry:
9	br label %bb
10
11bb:		; preds = %cond_next391, %entry
12	%cnt.0 = phi i32 [ 0, %entry ], [ %tmp422445, %cond_next391 ]		; <i32> [#uses=1]
13	%v.1 = phi i32 [ undef, %entry ], [ %tmp411, %cond_next391 ]		; <i32> [#uses=0]
14	br i1 false, label %cond_true, label %cond_next127
15
16cond_true:		; preds = %bb
17	store i8* null, i8** %byteptr, align 4
18	store i8* null, i8** %byteptr, align 4
19	br label %cond_next127
20
21cond_next127:		; preds = %cond_true, %bb
22	%tmp151 = add i32 0, %round		; <i32> [#uses=1]
23	%tmp153 = ashr i32 %tmp151, %scale		; <i32> [#uses=2]
24	%tmp154155 = trunc i32 %tmp153 to i16		; <i16> [#uses=1]
25	%tmp154155156 = sext i16 %tmp154155 to i32		; <i32> [#uses=1]
26	%tmp158 = xor i32 %tmp154155156, %tmp153		; <i32> [#uses=1]
27	%tmp160 = or i32 %tmp158, %cnt.0		; <i32> [#uses=1]
28	%tmp171 = load i32* %bitptr, align 4		; <i32> [#uses=1]
29	%tmp180181 = sext i16 0 to i32		; <i32> [#uses=3]
30	%tmp183 = add i32 %tmp160, 1		; <i32> [#uses=1]
31	br i1 false, label %cond_true188, label %cond_next245
32
33cond_true188:		; preds = %cond_next127
34	ret i16 0
35
36cond_next245:		; preds = %cond_next127
37	%tmp249 = ashr i32 %tmp180181, 8		; <i32> [#uses=1]
38	%tmp250 = add i32 %tmp171, %tmp249		; <i32> [#uses=1]
39	%tmp253444 = lshr i32 %tmp180181, 4		; <i32> [#uses=1]
40	%tmp254 = and i32 %tmp253444, 15		; <i32> [#uses=1]
41	%tmp256 = and i32 %tmp180181, 15		; <i32> [#uses=2]
42	%tmp264 = icmp ugt i32 %tmp250, 15		; <i1> [#uses=1]
43	br i1 %tmp264, label %cond_true267, label %cond_next391
44
45cond_true267:		; preds = %cond_next245
46	store i8* null, i8** %byteptr, align 4
47	store i8* null, i8** %byteptr, align 4
48	br i1 false, label %cond_true289, label %cond_next327
49
50cond_true289:		; preds = %cond_true267
51	ret i16 0
52
53cond_next327:		; preds = %cond_true267
54	br i1 false, label %cond_true343, label %cond_next385
55
56cond_true343:		; preds = %cond_next327
57	%tmp345 = load i8** %byteptr, align 4		; <i8*> [#uses=1]
58	store i8* null, i8** %byteptr, align 4
59	br i1 false, label %cond_next385, label %cond_true352
60
61cond_true352:		; preds = %cond_true343
62	store i8* %tmp345, i8** %byteptr, align 4
63	br i1 false, label %cond_true364, label %cond_next385
64
65cond_true364:		; preds = %cond_true352
66	ret i16 0
67
68cond_next385:		; preds = %cond_true352, %cond_true343, %cond_next327
69	br label %cond_next391
70
71cond_next391:		; preds = %cond_next385, %cond_next245
72	%tmp393 = load i32* %source, align 4		; <i32> [#uses=1]
73	%tmp395 = load i32* %bitptr, align 4		; <i32> [#uses=2]
74	%tmp396 = shl i32 %tmp393, %tmp395		; <i32> [#uses=1]
75	%tmp398 = sub i32 32, %tmp256		; <i32> [#uses=1]
76	%tmp405 = lshr i32 %tmp396, 31		; <i32> [#uses=1]
77	%tmp406 = add i32 %tmp405, -1		; <i32> [#uses=1]
78	%tmp409 = lshr i32 %tmp406, %tmp398		; <i32> [#uses=1]
79	%tmp411 = sub i32 0, %tmp409		; <i32> [#uses=1]
80	%tmp422445 = add i32 %tmp254, %tmp183		; <i32> [#uses=2]
81	%tmp426447 = add i32 %tmp395, %tmp256		; <i32> [#uses=1]
82	store i32 %tmp426447, i32* %bitptr, align 4
83	%tmp429448 = icmp ult i32 %tmp422445, 63		; <i1> [#uses=1]
84	br i1 %tmp429448, label %bb, label %UnifiedReturnBlock
85
86UnifiedReturnBlock:		; preds = %cond_next391
87	ret i16 0
88}
89