1; RUN: llc < %s -march=x86
2; RUN: llc -pre-RA-sched=source < %s -march=x86 -mcpu=corei7 | FileCheck %s --check-prefix=SOURCE-SCHED
3; PR2748
4
5@g_73 = external global i32		; <i32*> [#uses=1]
6@g_5 = external global i32		; <i32*> [#uses=1]
7
8define i32 @func_44(i16 signext %p_46) nounwind {
9entry:
10; SOURCE-SCHED: subl
11; SOURCE-SCHED: movl
12; SOURCE-SCHED: sarl
13; SOURCE-SCHED: cmpl
14; SOURCE-SCHED: setg
15; SOURCE-SCHED: movzbl
16; SOURCE-SCHED: movb
17; SOURCE-SCHED: xorl
18; SOURCE-SCHED: subl
19; SOURCE-SCHED: testb
20; SOURCE-SCHED: jne
21	%0 = load i32* @g_5, align 4		; <i32> [#uses=1]
22	%1 = ashr i32 %0, 1		; <i32> [#uses=1]
23	%2 = icmp sgt i32 %1, 1		; <i1> [#uses=1]
24	%3 = zext i1 %2 to i32		; <i32> [#uses=1]
25	%4 = load i32* @g_73, align 4		; <i32> [#uses=1]
26	%5 = zext i16 %p_46 to i64		; <i64> [#uses=1]
27	%6 = sub i64 0, %5		; <i64> [#uses=1]
28	%7 = trunc i64 %6 to i8		; <i8> [#uses=2]
29	%8 = trunc i32 %4 to i8		; <i8> [#uses=2]
30	%9 = icmp eq i8 %8, 0		; <i1> [#uses=1]
31	br i1 %9, label %bb11, label %bb12
32
33bb11:		; preds = %entry
34	%10 = urem i8 %7, %8		; <i8> [#uses=1]
35	br label %bb12
36
37bb12:		; preds = %bb11, %entry
38	%.014.in = phi i8 [ %10, %bb11 ], [ %7, %entry ]		; <i8> [#uses=1]
39	%11 = icmp ne i8 %.014.in, 0		; <i1> [#uses=1]
40	%12 = zext i1 %11 to i32		; <i32> [#uses=1]
41	%13 = tail call i32 (...)* @func_48( i32 %12, i32 %3, i32 0 ) nounwind		; <i32> [#uses=0]
42	ret i32 undef
43}
44
45declare i32 @func_48(...)
46