1; RUN: llc < %s -march=x86
2; PR2775
3
4define i32 @func_77(i8 zeroext %p_79) nounwind {
5entry:
6	%0 = tail call i32 (...)* @func_43(i32 1) nounwind		; <i32> [#uses=1]
7	%1 = icmp eq i32 %0, 0		; <i1> [#uses=1]
8	br i1 %1, label %bb3, label %bb
9
10bb:		; preds = %entry
11	br label %bb3
12
13bb3:		; preds = %bb, %entry
14	%p_79_addr.0 = phi i8 [ 0, %bb ], [ %p_79, %entry ]		; <i8> [#uses=1]
15	%2 = zext i8 %p_79_addr.0 to i32		; <i32> [#uses=2]
16	%3 = zext i1 false to i32		; <i32> [#uses=2]
17	%4 = tail call i32 (...)* @rshift_u_s(i32 1) nounwind		; <i32> [#uses=0]
18	%5 = lshr i32 %2, %2		; <i32> [#uses=3]
19	%6 = icmp eq i32 0, 0		; <i1> [#uses=1]
20	br i1 %6, label %bb6, label %bb9
21
22bb6:		; preds = %bb3
23	%7 = ashr i32 %5, %3		; <i32> [#uses=1]
24	%8 = icmp eq i32 %7, 0		; <i1> [#uses=1]
25	%9 = select i1 %8, i32 %3, i32 0		; <i32> [#uses=1]
26	%. = shl i32 %5, %9		; <i32> [#uses=1]
27	br label %bb9
28
29bb9:		; preds = %bb6, %bb3
30	%.0 = phi i32 [ %., %bb6 ], [ %5, %bb3 ]		; <i32> [#uses=0]
31	br i1 false, label %return, label %bb10
32
33bb10:		; preds = %bb9
34	ret i32 undef
35
36return:		; preds = %bb9
37	ret i32 undef
38}
39
40declare i32 @func_43(...)
41
42declare i32 @rshift_u_s(...)
43