1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding | FileCheck %s 2 3; CHECK-LABEL: sitof32 4; CHECK: vcvtdq2ps %zmm 5; CHECK: ret 6define <16 x float> @sitof32(<16 x i32> %a) nounwind { 7 %b = sitofp <16 x i32> %a to <16 x float> 8 ret <16 x float> %b 9} 10 11; CHECK-LABEL: fptosi00 12; CHECK: vcvttps2dq %zmm 13; CHECK: ret 14define <16 x i32> @fptosi00(<16 x float> %a) nounwind { 15 %b = fptosi <16 x float> %a to <16 x i32> 16 ret <16 x i32> %b 17} 18 19; CHECK-LABEL: fptoui00 20; CHECK: vcvttps2udq 21; CHECK: ret 22define <16 x i32> @fptoui00(<16 x float> %a) nounwind { 23 %b = fptoui <16 x float> %a to <16 x i32> 24 ret <16 x i32> %b 25} 26 27; CHECK-LABEL: fptoui_256 28; CHECK: vcvttps2udq 29; CHECK: ret 30define <8 x i32> @fptoui_256(<8 x float> %a) nounwind { 31 %b = fptoui <8 x float> %a to <8 x i32> 32 ret <8 x i32> %b 33} 34 35; CHECK-LABEL: fptoui_128 36; CHECK: vcvttps2udq 37; CHECK: ret 38define <4 x i32> @fptoui_128(<4 x float> %a) nounwind { 39 %b = fptoui <4 x float> %a to <4 x i32> 40 ret <4 x i32> %b 41} 42 43; CHECK-LABEL: fptoui01 44; CHECK: vcvttpd2udq 45; CHECK: ret 46define <8 x i32> @fptoui01(<8 x double> %a) nounwind { 47 %b = fptoui <8 x double> %a to <8 x i32> 48 ret <8 x i32> %b 49} 50 51; CHECK-LABEL: sitof64 52; CHECK: vcvtdq2pd %ymm 53; CHECK: ret 54define <8 x double> @sitof64(<8 x i32> %a) { 55 %b = sitofp <8 x i32> %a to <8 x double> 56 ret <8 x double> %b 57} 58 59; CHECK-LABEL: fptosi01 60; CHECK: vcvttpd2dq %zmm 61; CHECK: ret 62define <8 x i32> @fptosi01(<8 x double> %a) { 63 %b = fptosi <8 x double> %a to <8 x i32> 64 ret <8 x i32> %b 65} 66 67; CHECK-LABEL: fptrunc00 68; CHECK: vcvtpd2ps %zmm 69; CHECK-NEXT: vcvtpd2ps %zmm 70; CHECK-NEXT: vinsertf64x4 $1 71; CHECK: ret 72define <16 x float> @fptrunc00(<16 x double> %b) nounwind { 73 %a = fptrunc <16 x double> %b to <16 x float> 74 ret <16 x float> %a 75} 76 77; CHECK-LABEL: fpext00 78; CHECK: vcvtps2pd %ymm0, %zmm0 79; CHECK: ret 80define <8 x double> @fpext00(<8 x float> %b) nounwind { 81 %a = fpext <8 x float> %b to <8 x double> 82 ret <8 x double> %a 83} 84 85; CHECK-LABEL: funcA 86; CHECK: vcvtsi2sdq (%rdi){{.*}} encoding: [0x62 87; CHECK: ret 88define double @funcA(i64* nocapture %e) { 89entry: 90 %tmp1 = load i64* %e, align 8 91 %conv = sitofp i64 %tmp1 to double 92 ret double %conv 93} 94 95; CHECK-LABEL: funcB 96; CHECK: vcvtsi2sdl (%{{.*}} encoding: [0x62 97; CHECK: ret 98define double @funcB(i32* %e) { 99entry: 100 %tmp1 = load i32* %e, align 4 101 %conv = sitofp i32 %tmp1 to double 102 ret double %conv 103} 104 105; CHECK-LABEL: funcC 106; CHECK: vcvtsi2ssl (%{{.*}} encoding: [0x62 107; CHECK: ret 108define float @funcC(i32* %e) { 109entry: 110 %tmp1 = load i32* %e, align 4 111 %conv = sitofp i32 %tmp1 to float 112 ret float %conv 113} 114 115; CHECK-LABEL: i64tof32 116; CHECK: vcvtsi2ssq (%{{.*}} encoding: [0x62 117; CHECK: ret 118define float @i64tof32(i64* %e) { 119entry: 120 %tmp1 = load i64* %e, align 8 121 %conv = sitofp i64 %tmp1 to float 122 ret float %conv 123} 124 125; CHECK-LABEL: fpext 126; CHECK: vcvtss2sd {{.*}} encoding: [0x62 127; CHECK: ret 128define void @fpext() { 129entry: 130 %f = alloca float, align 4 131 %d = alloca double, align 8 132 %tmp = load float* %f, align 4 133 %conv = fpext float %tmp to double 134 store double %conv, double* %d, align 8 135 ret void 136} 137 138; CHECK-LABEL: fpround_scalar 139; CHECK: vmovsd {{.*}} encoding: [0x62 140; CHECK: vcvtsd2ss {{.*}} encoding: [0x62 141; CHECK: vmovss {{.*}} encoding: [0x62 142; CHECK: ret 143define void @fpround_scalar() nounwind uwtable { 144entry: 145 %f = alloca float, align 4 146 %d = alloca double, align 8 147 %tmp = load double* %d, align 8 148 %conv = fptrunc double %tmp to float 149 store float %conv, float* %f, align 4 150 ret void 151} 152 153; CHECK-LABEL: long_to_double 154; CHECK: vmovq {{.*}} encoding: [0x62 155; CHECK: ret 156define double @long_to_double(i64 %x) { 157 %res = bitcast i64 %x to double 158 ret double %res 159} 160 161; CHECK-LABEL: double_to_long 162; CHECK: vmovq {{.*}} encoding: [0x62 163; CHECK: ret 164define i64 @double_to_long(double %x) { 165 %res = bitcast double %x to i64 166 ret i64 %res 167} 168 169; CHECK-LABEL: int_to_float 170; CHECK: vmovd {{.*}} encoding: [0x62 171; CHECK: ret 172define float @int_to_float(i32 %x) { 173 %res = bitcast i32 %x to float 174 ret float %res 175} 176 177; CHECK-LABEL: float_to_int 178; CHECK: vmovd {{.*}} encoding: [0x62 179; CHECK: ret 180define i32 @float_to_int(float %x) { 181 %res = bitcast float %x to i32 182 ret i32 %res 183} 184 185; CHECK-LABEL: uitof64 186; CHECK: vcvtudq2pd 187; CHECK: vextracti64x4 188; CHECK: vcvtudq2pd 189; CHECK: ret 190define <16 x double> @uitof64(<16 x i32> %a) nounwind { 191 %b = uitofp <16 x i32> %a to <16 x double> 192 ret <16 x double> %b 193} 194 195; CHECK-LABEL: uitof64_256 196; CHECK: vcvtudq2pd 197; CHECK: ret 198define <4 x double> @uitof64_256(<4 x i32> %a) nounwind { 199 %b = uitofp <4 x i32> %a to <4 x double> 200 ret <4 x double> %b 201} 202 203; CHECK-LABEL: uitof32 204; CHECK: vcvtudq2ps 205; CHECK: ret 206define <16 x float> @uitof32(<16 x i32> %a) nounwind { 207 %b = uitofp <16 x i32> %a to <16 x float> 208 ret <16 x float> %b 209} 210 211; CHECK-LABEL: uitof32_256 212; CHECK: vcvtudq2ps 213; CHECK: ret 214define <8 x float> @uitof32_256(<8 x i32> %a) nounwind { 215 %b = uitofp <8 x i32> %a to <8 x float> 216 ret <8 x float> %b 217} 218 219; CHECK-LABEL: uitof32_128 220; CHECK: vcvtudq2ps 221; CHECK: ret 222define <4 x float> @uitof32_128(<4 x i32> %a) nounwind { 223 %b = uitofp <4 x i32> %a to <4 x float> 224 ret <4 x float> %b 225} 226 227; CHECK-LABEL: @fptosi02 228; CHECK: vcvttss2si {{.*}} encoding: [0x62 229; CHECK: ret 230define i32 @fptosi02(float %a) nounwind { 231 %b = fptosi float %a to i32 232 ret i32 %b 233} 234 235; CHECK-LABEL: @fptoui02 236; CHECK: vcvttss2usi {{.*}} encoding: [0x62 237; CHECK: ret 238define i32 @fptoui02(float %a) nounwind { 239 %b = fptoui float %a to i32 240 ret i32 %b 241} 242 243; CHECK-LABEL: @uitofp02 244; CHECK: vcvtusi2ss 245; CHECK: ret 246define float @uitofp02(i32 %a) nounwind { 247 %b = uitofp i32 %a to float 248 ret float %b 249} 250 251; CHECK-LABEL: @uitofp03 252; CHECK: vcvtusi2sd 253; CHECK: ret 254define double @uitofp03(i32 %a) nounwind { 255 %b = uitofp i32 %a to double 256 ret double %b 257} 258 259; CHECK-LABEL: @sitofp_16i1_float 260; CHECK: vpbroadcastd 261; CHECK: vcvtdq2ps 262define <16 x float> @sitofp_16i1_float(<16 x i32> %a) { 263 %mask = icmp slt <16 x i32> %a, zeroinitializer 264 %1 = sitofp <16 x i1> %mask to <16 x float> 265 ret <16 x float> %1 266} 267 268; CHECK-LABEL: @sitofp_16i8_float 269; CHECK: vpmovsxbd 270; CHECK: vcvtdq2ps 271define <16 x float> @sitofp_16i8_float(<16 x i8> %a) { 272 %1 = sitofp <16 x i8> %a to <16 x float> 273 ret <16 x float> %1 274} 275 276; CHECK-LABEL: @sitofp_16i16_float 277; CHECK: vpmovsxwd 278; CHECK: vcvtdq2ps 279define <16 x float> @sitofp_16i16_float(<16 x i16> %a) { 280 %1 = sitofp <16 x i16> %a to <16 x float> 281 ret <16 x float> %1 282} 283 284; CHECK-LABEL: @sitofp_8i16_double 285; CHECK: vpmovsxwd 286; CHECK: vcvtdq2pd 287define <8 x double> @sitofp_8i16_double(<8 x i16> %a) { 288 %1 = sitofp <8 x i16> %a to <8 x double> 289 ret <8 x double> %1 290} 291 292; CHECK-LABEL: sitofp_8i8_double 293; CHECK: vpmovzxwd 294; CHECK: vpslld 295; CHECK: vpsrad 296; CHECK: vcvtdq2pd 297define <8 x double> @sitofp_8i8_double(<8 x i8> %a) { 298 %1 = sitofp <8 x i8> %a to <8 x double> 299 ret <8 x double> %1 300} 301 302 303; CHECK-LABEL: @sitofp_8i1_double 304; CHECK: vpbroadcastq 305; CHECK: vcvtdq2pd 306define <8 x double> @sitofp_8i1_double(<8 x double> %a) { 307 %cmpres = fcmp ogt <8 x double> %a, zeroinitializer 308 %1 = sitofp <8 x i1> %cmpres to <8 x double> 309 ret <8 x double> %1 310} 311