1; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s
2; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s
3
4define i8 @test_sdiv8(i8 %dividend, i8 %divisor) nounwind {
5entry:
6  %result = sdiv i8 %dividend, %divisor
7  ret i8 %result
8}
9
10; CHECK-LABEL: test_sdiv8:
11; CHECK: movsbw
12; CHECK: idivb
13
14define i8 @test_srem8(i8 %dividend, i8 %divisor) nounwind {
15entry:
16  %result = srem i8 %dividend, %divisor
17  ret i8 %result
18}
19
20; CHECK-LABEL: test_srem8:
21; CHECK: movsbw
22; CHECK: idivb
23
24define i8 @test_udiv8(i8 %dividend, i8 %divisor) nounwind {
25entry:
26  %result = udiv i8 %dividend, %divisor
27  ret i8 %result
28}
29
30; CHECK-LABEL: test_udiv8:
31; CHECK: movzbw
32; CHECK: divb
33
34define i8 @test_urem8(i8 %dividend, i8 %divisor) nounwind {
35entry:
36  %result = urem i8 %dividend, %divisor
37  ret i8 %result
38}
39
40; CHECK-LABEL: test_urem8:
41; CHECK: movzbw
42; CHECK: divb
43
44define i16 @test_sdiv16(i16 %dividend, i16 %divisor) nounwind {
45entry:
46  %result = sdiv i16 %dividend, %divisor
47  ret i16 %result
48}
49
50; CHECK-LABEL: test_sdiv16:
51; CHECK: cwtd
52; CHECK: idivw
53
54define i16 @test_srem16(i16 %dividend, i16 %divisor) nounwind {
55entry:
56  %result = srem i16 %dividend, %divisor
57  ret i16 %result
58}
59
60; CHECK-LABEL: test_srem16:
61; CHECK: cwtd
62; CHECK: idivw
63
64define i16 @test_udiv16(i16 %dividend, i16 %divisor) nounwind {
65entry:
66  %result = udiv i16 %dividend, %divisor
67  ret i16 %result
68}
69
70; CHECK-LABEL: test_udiv16:
71; CHECK: xorl
72; CHECK: divw
73
74define i16 @test_urem16(i16 %dividend, i16 %divisor) nounwind {
75entry:
76  %result = urem i16 %dividend, %divisor
77  ret i16 %result
78}
79
80; CHECK-LABEL: test_urem16:
81; CHECK: xorl
82; CHECK: divw
83
84define i32 @test_sdiv32(i32 %dividend, i32 %divisor) nounwind {
85entry:
86  %result = sdiv i32 %dividend, %divisor
87  ret i32 %result
88}
89
90; CHECK-LABEL: test_sdiv32:
91; CHECK: cltd
92; CHECK: idivl
93
94define i32 @test_srem32(i32 %dividend, i32 %divisor) nounwind {
95entry:
96  %result = srem i32 %dividend, %divisor
97  ret i32 %result
98}
99
100; CHECK-LABEL: test_srem32:
101; CHECK: cltd
102; CHECK: idivl
103
104define i32 @test_udiv32(i32 %dividend, i32 %divisor) nounwind {
105entry:
106  %result = udiv i32 %dividend, %divisor
107  ret i32 %result
108}
109
110; CHECK-LABEL: test_udiv32:
111; CHECK: xorl
112; CHECK: divl
113
114define i32 @test_urem32(i32 %dividend, i32 %divisor) nounwind {
115entry:
116  %result = urem i32 %dividend, %divisor
117  ret i32 %result
118}
119
120; CHECK-LABEL: test_urem32:
121; CHECK: xorl
122; CHECK: divl
123