1; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 | FileCheck %s
2; RUN: opt -instsimplify -disable-output < %s
3
4;CHECK: SHUFF0
5define <8 x i32*> @SHUFF0(<4 x i32*> %ptrv) nounwind {
6entry:
7  %G = shufflevector <4 x i32*> %ptrv, <4 x i32*> %ptrv, <8 x i32> <i32 2, i32 7, i32 1, i32 2, i32 4, i32 5, i32 1, i32 1>
8;CHECK: pshufd
9  ret <8 x i32*> %G
10;CHECK: ret
11}
12
13;CHECK: SHUFF1
14define <4 x i32*> @SHUFF1(<4 x i32*> %ptrv) nounwind {
15entry:
16  %G = shufflevector <4 x i32*> %ptrv, <4 x i32*> %ptrv, <4 x i32> <i32 2, i32 7, i32 7, i32 2>
17;CHECK: pshufd
18  ret <4 x i32*> %G
19;CHECK: ret
20}
21
22;CHECK: SHUFF3
23define <4 x i8*> @SHUFF3(<4 x i8*> %ptrv) nounwind {
24entry:
25  %G = shufflevector <4 x i8*> %ptrv, <4 x i8*> undef, <4 x i32> <i32 2, i32 7, i32 1, i32 2>
26;CHECK: pshufd
27  ret <4 x i8*> %G
28;CHECK: ret
29}
30
31;CHECK: LOAD0
32define <4 x i8*> @LOAD0(<4 x i8*>* %p) nounwind {
33entry:
34  %G = load <4 x i8*>* %p
35;CHECK: movaps
36  ret <4 x i8*> %G
37;CHECK: ret
38}
39
40;CHECK: LOAD1
41define <4 x i8*> @LOAD1(<4 x i8*>* %p) nounwind {
42entry:
43  %G = load <4 x i8*>* %p
44;CHECK: movdqa
45;CHECK: pshufd
46;CHECK: movdqa
47  %T = shufflevector <4 x i8*> %G, <4 x i8*> %G, <4 x i32> <i32 7, i32 1, i32 4, i32 3>
48  store <4 x i8*> %T, <4 x i8*>* %p
49  ret <4 x i8*> %G
50;CHECK: ret
51}
52
53;CHECK: LOAD2
54define <4 x i8*> @LOAD2(<4 x i8*>* %p) nounwind {
55entry:
56  %I = alloca <4 x i8*>
57;CHECK: sub
58  %G = load <4 x i8*>* %p
59;CHECK: movaps
60  store <4 x i8*> %G, <4 x i8*>* %I
61;CHECK: movaps
62  %Z = load <4 x i8*>* %I
63  ret <4 x i8*> %Z
64;CHECK: add
65;CHECK: ret
66}
67
68;CHECK: INT2PTR0
69define <4 x i32> @INT2PTR0(<4 x i8*>* %p) nounwind {
70entry:
71  %G = load <4 x i8*>* %p
72;CHECK: movl
73;CHECK: movaps
74  %K = ptrtoint <4 x i8*> %G to <4 x i32>
75;CHECK: ret
76  ret <4 x i32> %K
77}
78
79;CHECK: INT2PTR1
80define <4 x i32*> @INT2PTR1(<4 x i8>* %p) nounwind {
81entry:
82  %G = load <4 x i8>* %p
83;CHECK: movl
84;CHECK: pmovzxbd
85;CHECK: pand
86  %K = inttoptr <4 x i8> %G to <4 x i32*>
87;CHECK: ret
88  ret <4 x i32*> %K
89}
90
91;CHECK: BITCAST0
92define <4 x i32*> @BITCAST0(<4 x i8*>* %p) nounwind {
93entry:
94  %G = load <4 x i8*>* %p
95;CHECK: movl
96  %T = bitcast <4 x i8*> %G to <4 x i32*>
97;CHECK: movaps
98;CHECK: ret
99  ret <4 x i32*> %T
100}
101
102;CHECK: BITCAST1
103define <2 x i32*> @BITCAST1(<2 x i8*>* %p) nounwind {
104entry:
105  %G = load <2 x i8*>* %p
106;CHECK: movl
107;CHECK: pmovzxdq
108  %T = bitcast <2 x i8*> %G to <2 x i32*>
109;CHECK: ret
110  ret <2 x i32*> %T
111}
112
113;CHECK: ICMP0
114define <4 x i32> @ICMP0(<4 x i8*>* %p0, <4 x i8*>* %p1) nounwind {
115entry:
116  %g0 = load <4 x i8*>* %p0
117  %g1 = load <4 x i8*>* %p1
118  %k = icmp sgt <4 x i8*> %g0, %g1
119  ;CHECK: pcmpgtd
120  %j = select <4 x i1> %k, <4 x i32> <i32 0, i32 1, i32 2, i32 4>, <4 x i32> <i32 9, i32 8, i32 7, i32 6>
121  ret <4 x i32> %j
122  ;CHECK: ret
123}
124
125;CHECK: ICMP1
126define <4 x i32> @ICMP1(<4 x i8*>* %p0, <4 x i8*>* %p1) nounwind {
127entry:
128  %g0 = load <4 x i8*>* %p0
129  %g1 = load <4 x i8*>* %p1
130  %k = icmp eq <4 x i8*> %g0, %g1
131  ;CHECK: pcmpeqd
132  %j = select <4 x i1> %k, <4 x i32> <i32 0, i32 1, i32 2, i32 4>, <4 x i32> <i32 9, i32 8, i32 7, i32 6>
133  ret <4 x i32> %j
134  ;CHECK: ret
135}
136
137