1; RUN: llc < %s -march=x86 -mcpu=generic -x86-asm-syntax=intel | \
2; RUN:   grep "sh[lr]d" | count 5
3
4define i64 @test1(i64 %X, i8 %C) {
5        %shift.upgrd.1 = zext i8 %C to i64              ; <i64> [#uses=1]
6        %Y = shl i64 %X, %shift.upgrd.1         ; <i64> [#uses=1]
7        ret i64 %Y
8}
9
10define i64 @test2(i64 %X, i8 %C) {
11        %shift.upgrd.2 = zext i8 %C to i64              ; <i64> [#uses=1]
12        %Y = ashr i64 %X, %shift.upgrd.2                ; <i64> [#uses=1]
13        ret i64 %Y
14}
15
16define i64 @test3(i64 %X, i8 %C) {
17        %shift.upgrd.3 = zext i8 %C to i64              ; <i64> [#uses=1]
18        %Y = lshr i64 %X, %shift.upgrd.3                ; <i64> [#uses=1]
19        ret i64 %Y
20}
21
22define i32 @test4(i32 %A, i32 %B, i8 %C) {
23        %shift.upgrd.4 = zext i8 %C to i32              ; <i32> [#uses=1]
24        %X = shl i32 %A, %shift.upgrd.4         ; <i32> [#uses=1]
25        %Cv = sub i8 32, %C             ; <i8> [#uses=1]
26        %shift.upgrd.5 = zext i8 %Cv to i32             ; <i32> [#uses=1]
27        %Y = lshr i32 %B, %shift.upgrd.5                ; <i32> [#uses=1]
28        %Z = or i32 %Y, %X              ; <i32> [#uses=1]
29        ret i32 %Z
30}
31
32define i16 @test5(i16 %A, i16 %B, i8 %C) {
33        %shift.upgrd.6 = zext i8 %C to i16              ; <i16> [#uses=1]
34        %X = shl i16 %A, %shift.upgrd.6         ; <i16> [#uses=1]
35        %Cv = sub i8 16, %C             ; <i8> [#uses=1]
36        %shift.upgrd.7 = zext i8 %Cv to i16             ; <i16> [#uses=1]
37        %Y = lshr i16 %B, %shift.upgrd.7                ; <i16> [#uses=1]
38        %Z = or i16 %Y, %X              ; <i16> [#uses=1]
39        ret i16 %Z
40}
41
42