1; RUN: llc < %s -O1 -mtriple=i386-apple-darwin | FileCheck %s
2;
3; Interesting test case where %tmp1220 = xor i32 %tmp862, %tmp592 and
4; %tmp1676 = xor i32 %tmp1634, %tmp1530 have zero demanded bits after
5; DAGCombiner optimization pass.  These are changed to undef and in turn
6; the successor shl(s) become shl undef, 1.  This pattern then matches
7; shl x, 1 -> add x, x.  add undef, undef doesn't guarentee the low
8; order bit is zero and is incorrect.
9;
10; See rdar://9453156 and rdar://9487392.
11;
12
13; CHECK-NOT: shl
14define i32 @foo(i8* %a0, i32* %a2) nounwind {
15entry:
16  %tmp0 = alloca i8
17  %tmp1 = alloca i32
18  store i8 1, i8* %tmp0
19  %tmp921.i7845 = load i8* %a0, align 1
20  %tmp309 = xor i8 %tmp921.i7845, 104
21  %tmp592 = zext i8 %tmp309 to i32
22  %tmp862 = xor i32 1293461297, %tmp592
23  %tmp1220 = xor i32 %tmp862, %tmp592
24  %tmp1506 = shl i32 %tmp1220, 1
25  %tmp1530 = sub i32 %tmp592, %tmp1506
26  %tmp1557 = sub i32 %tmp1530, 542767629
27  %tmp1607 = and i32 %tmp1557, 1
28  store i32 %tmp1607, i32* %tmp1
29  %tmp1634 = and i32 %tmp1607, 2080309246
30  %tmp1676 = xor i32 %tmp1634, %tmp1530
31  %tmp1618 = shl i32 %tmp1676, 1
32  %tmp1645 = sub i32 %tmp862, %tmp1618
33  %tmp1697 = and i32 %tmp1645, 1
34  store i32 %tmp1697, i32* %a2
35  ret i32 %tmp1607
36}
37
38; CHECK-NOT: shl
39; shl undef, 0 -> undef
40define i32 @foo2_undef() nounwind {
41entry:
42  %tmp2 = shl i32 undef, 0;
43  ret i32 %tmp2
44}
45
46; CHECK-NOT: shl
47; shl undef, x -> 0
48define i32 @foo1_undef(i32* %a0) nounwind {
49entry:
50  %tmp1 = load i32* %a0, align 1
51  %tmp2 = shl i32 undef, %tmp1;
52  ret i32 %tmp2
53}
54