1; RUN: llc -mtriple=i386-apple-darwin9 -mcpu=corei7 -fast-isel=false -O0 < %s | FileCheck %s
2
3; Gather non-machine specific tests for the transformations in
4; CodeGen/SelectionDAG/TargetLowering.  Currently, these
5; can't be tested easily by checking the SDNodes that are
6; the data structures that these transformations act on.
7; Therefore, use X86 assembler output to check against.
8
9; rdar://11195364 A problem with the transformation:
10;  If all of the demanded bits on one side are known, and all of the set
11;  bits on that side are also known to be set on the other side, turn this
12;  into an AND, as we know the bits will be cleared.
13; The known set (one) bits for the arguments %xor1 are not the same, so the
14; transformation should not occur
15define void @foo(i32 %i32In1, i32 %i32In2, i32 %i32In3, i32 %i32In4,
16                 i32 %i32In5, i32 %i32In6, i32* %i32StarOut, i1 %i1In1,
17                 i32* %i32SelOut) nounwind {
18    %and3 = and i32 %i32In1, 1362779777
19    %or2 = or i32 %i32In2, %i32In3
20    %and2 = and i32 %or2, 1362779777
21    %xor3 = xor i32 %and3, %and2
22    ; CHECK: shll
23    %shl1 = shl i32 %xor3, %i32In4
24    %sub1 = sub i32 %or2, %shl1
25    %add1 = add i32 %sub1, %i32In5
26    %and1 = and i32 %add1, 1
27    %xor2 = xor i32 %and1, 1
28    %or1 = or i32 %xor2, 364806994 ;0x15BE8352
29    ; CHECK-NOT: andl $96239955
30    %xor1 = xor i32 %or1, 268567040 ;0x10020200
31    ; force an output so not DCE'd
32    store i32 %xor1, i32* %i32StarOut
33    ; force not fast isel by using a select
34    %i32SelVal = select i1 %i1In1, i32 %i32In1, i32 %xor1
35    store i32 %i32SelVal, i32* %i32SelOut
36    ; CHECK: ret
37    ret void
38}
39