1; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
2
3define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone {
4entry:
5  ; CHECK-LABEL: test_x86_tbm_bextri_u32:
6  ; CHECK-NOT: mov
7  ; CHECK: bextr $
8  %0 = lshr i32 %a, 4
9  %1 = and i32 %0, 4095
10  ret i32 %1
11}
12
13define i32 @test_x86_tbm_bextri_u32_m(i32* nocapture %a) nounwind readonly {
14entry:
15  ; CHECK-LABEL: test_x86_tbm_bextri_u32_m:
16  ; CHECK-NOT: mov
17  ; CHECK: bextr $
18  %0 = load i32* %a
19  %1 = lshr i32 %0, 4
20  %2 = and i32 %1, 4095
21  ret i32 %2
22}
23
24define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
25entry:
26  ; CHECK-LABEL: test_x86_tbm_bextri_u64:
27  ; CHECK-NOT: mov
28  ; CHECK: bextr $
29  %0 = lshr i64 %a, 4
30  %1 = and i64 %0, 4095
31  ret i64 %1
32}
33
34define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind readonly {
35entry:
36  ; CHECK-LABEL: test_x86_tbm_bextri_u64_m:
37  ; CHECK-NOT: mov
38  ; CHECK: bextr $
39  %0 = load i64* %a
40  %1 = lshr i64 %0, 4
41  %2 = and i64 %1, 4095
42  ret i64 %2
43}
44
45define i32 @test_x86_tbm_blcfill_u32(i32 %a) nounwind readnone {
46entry:
47  ; CHECK-LABEL: test_x86_tbm_blcfill_u32:
48  ; CHECK-NOT: mov
49  ; CHECK: blcfill %
50  %0 = add i32 %a, 1
51  %1 = and i32 %0, %a
52  ret i32 %1
53}
54
55define i64 @test_x86_tbm_blcfill_u64(i64 %a) nounwind readnone {
56entry:
57  ; CHECK-LABEL: test_x86_tbm_blcfill_u64:
58  ; CHECK-NOT: mov
59  ; CHECK: blcfill %
60  %0 = add i64 %a, 1
61  %1 = and i64 %0, %a
62  ret i64 %1
63}
64
65define i32 @test_x86_tbm_blci_u32(i32 %a) nounwind readnone {
66entry:
67  ; CHECK-LABEL: test_x86_tbm_blci_u32:
68  ; CHECK-NOT: mov
69  ; CHECK: blci %
70  %0 = add i32 1, %a
71  %1 = xor i32 %0, -1
72  %2 = or i32 %1, %a
73  ret i32 %2
74}
75
76define i64 @test_x86_tbm_blci_u64(i64 %a) nounwind readnone {
77entry:
78  ; CHECK-LABEL: test_x86_tbm_blci_u64:
79  ; CHECK-NOT: mov
80  ; CHECK: blci %
81  %0 = add i64 1, %a
82  %1 = xor i64 %0, -1
83  %2 = or i64 %1, %a
84  ret i64 %2
85}
86
87define i32 @test_x86_tbm_blci_u32_b(i32 %a) nounwind readnone {
88entry:
89  ; CHECK-LABEL: test_x86_tbm_blci_u32_b:
90  ; CHECK-NOT: mov
91  ; CHECK: blci %
92  %0 = sub i32 -2, %a
93  %1 = or i32 %0, %a
94  ret i32 %1
95}
96
97define i64 @test_x86_tbm_blci_u64_b(i64 %a) nounwind readnone {
98entry:
99  ; CHECK-LABEL: test_x86_tbm_blci_u64_b:
100  ; CHECK-NOT: mov
101  ; CHECK: blci %
102  %0 = sub i64 -2, %a
103  %1 = or i64 %0, %a
104  ret i64 %1
105}
106
107define i32 @test_x86_tbm_blcic_u32(i32 %a) nounwind readnone {
108entry:
109  ; CHECK-LABEL: test_x86_tbm_blcic_u32:
110  ; CHECK-NOT: mov
111  ; CHECK: blcic %
112  %0 = xor i32 %a, -1
113  %1 = add i32 %a, 1
114  %2 = and i32 %1, %0
115  ret i32 %2
116}
117
118define i64 @test_x86_tbm_blcic_u64(i64 %a) nounwind readnone {
119entry:
120  ; CHECK-LABEL: test_x86_tbm_blcic_u64:
121  ; CHECK-NOT: mov
122  ; CHECK: blcic %
123  %0 = xor i64 %a, -1
124  %1 = add i64 %a, 1
125  %2 = and i64 %1, %0
126  ret i64 %2
127}
128
129define i32 @test_x86_tbm_blcmsk_u32(i32 %a) nounwind readnone {
130entry:
131  ; CHECK-LABEL: test_x86_tbm_blcmsk_u32:
132  ; CHECK-NOT: mov
133  ; CHECK: blcmsk %
134  %0 = add i32 %a, 1
135  %1 = xor i32 %0, %a
136  ret i32 %1
137}
138
139define i64 @test_x86_tbm_blcmsk_u64(i64 %a) nounwind readnone {
140entry:
141  ; CHECK-LABEL: test_x86_tbm_blcmsk_u64:
142  ; CHECK-NOT: mov
143  ; CHECK: blcmsk %
144  %0 = add i64 %a, 1
145  %1 = xor i64 %0, %a
146  ret i64 %1
147}
148
149define i32 @test_x86_tbm_blcs_u32(i32 %a) nounwind readnone {
150entry:
151  ; CHECK-LABEL: test_x86_tbm_blcs_u32:
152  ; CHECK-NOT: mov
153  ; CHECK: blcs %
154  %0 = add i32 %a, 1
155  %1 = or i32 %0, %a
156  ret i32 %1
157}
158
159define i64 @test_x86_tbm_blcs_u64(i64 %a) nounwind readnone {
160entry:
161  ; CHECK-LABEL: test_x86_tbm_blcs_u64:
162  ; CHECK-NOT: mov
163  ; CHECK: blcs %
164  %0 = add i64 %a, 1
165  %1 = or i64 %0, %a
166  ret i64 %1
167}
168
169define i32 @test_x86_tbm_blsfill_u32(i32 %a) nounwind readnone {
170entry:
171  ; CHECK-LABEL: test_x86_tbm_blsfill_u32:
172  ; CHECK-NOT: mov
173  ; CHECK: blsfill %
174  %0 = add i32 %a, -1
175  %1 = or i32 %0, %a
176  ret i32 %1
177}
178
179define i64 @test_x86_tbm_blsfill_u64(i64 %a) nounwind readnone {
180entry:
181  ; CHECK-LABEL: test_x86_tbm_blsfill_u64:
182  ; CHECK-NOT: mov
183  ; CHECK: blsfill %
184  %0 = add i64 %a, -1
185  %1 = or i64 %0, %a
186  ret i64 %1
187}
188
189define i32 @test_x86_tbm_blsic_u32(i32 %a) nounwind readnone {
190entry:
191  ; CHECK-LABEL: test_x86_tbm_blsic_u32:
192  ; CHECK-NOT: mov
193  ; CHECK: blsic %
194  %0 = xor i32 %a, -1
195  %1 = add i32 %a, -1
196  %2 = or i32 %0, %1
197  ret i32 %2
198}
199
200define i64 @test_x86_tbm_blsic_u64(i64 %a) nounwind readnone {
201entry:
202  ; CHECK-LABEL: test_x86_tbm_blsic_u64:
203  ; CHECK-NOT: mov
204  ; CHECK: blsic %
205  %0 = xor i64 %a, -1
206  %1 = add i64 %a, -1
207  %2 = or i64 %0, %1
208  ret i64 %2
209}
210
211define i32 @test_x86_tbm_t1mskc_u32(i32 %a) nounwind readnone {
212entry:
213  ; CHECK-LABEL: test_x86_tbm_t1mskc_u32:
214  ; CHECK-NOT: mov
215  ; CHECK: t1mskc %
216  %0 = xor i32 %a, -1
217  %1 = add i32 %a, 1
218  %2 = or i32 %0, %1
219  ret i32 %2
220}
221
222define i64 @Ttest_x86_tbm_t1mskc_u64(i64 %a) nounwind readnone {
223entry:
224  ; CHECK-LABEL: test_x86_tbm_t1mskc_u64:
225  ; CHECK-NOT: mov
226  ; CHECK: t1mskc %
227  %0 = xor i64 %a, -1
228  %1 = add i64 %a, 1
229  %2 = or i64 %0, %1
230  ret i64 %2
231}
232
233define i32 @test_x86_tbm_tzmsk_u32(i32 %a) nounwind readnone {
234entry:
235  ; CHECK-LABEL: test_x86_tbm_tzmsk_u32:
236  ; CHECK-NOT: mov
237  ; CHECK: tzmsk %
238  %0 = xor i32 %a, -1
239  %1 = add i32 %a, -1
240  %2 = and i32 %0, %1
241  ret i32 %2
242}
243
244define i64 @test_x86_tbm_tzmsk_u64(i64 %a) nounwind readnone {
245entry:
246  ; CHECK-LABEL: test_x86_tbm_tzmsk_u64:
247  ; CHECK-NOT: mov
248  ; CHECK: tzmsk %
249  %0 = xor i64 %a, -1
250  %1 = add i64 %a, -1
251  %2 = and i64 %0, %1
252  ret i64 %2
253}
254