1; RUN: llc --march=x86 --mcpu=x86-64 --mattr=ssse3 < %s
2; RUN: llc --march=x86-64 --mcpu=x86-64 --mattr=ssse3 < %s
3
4;PR18045:
5;Issue of selection for 'v4i32 load'.
6;This instruction is not legal for X86 CPUs with sse < 'sse4.1'.
7;This node was generated by X86ISelLowering.cpp, EltsFromConsecutiveLoads
8;static function after legalize stage.
9
10@e = external global [4 x i32], align 4
11@f = external global [4 x i32], align 4
12
13; Function Attrs: nounwind
14define void @fn3(i32 %el) {
15entry:
16  %0 = load i32* getelementptr inbounds ([4 x i32]* @e, i32 0, i32 0)
17  %1 = load i32* getelementptr inbounds ([4 x i32]* @e, i32 0, i32 1)
18  %2 = load i32* getelementptr inbounds ([4 x i32]* @e, i32 0, i32 2)
19  %3 = load i32* getelementptr inbounds ([4 x i32]* @e, i32 0, i32 3)
20  %4 = insertelement <4 x i32> undef, i32 %0, i32 0
21  %5 = insertelement <4 x i32> %4, i32 %1, i32 1
22  %6 = insertelement <4 x i32> %5, i32 %2, i32 2
23  %7 = insertelement <4 x i32> %6, i32 %3, i32 3
24  %8 = add <4 x i32> %6, %7
25  store <4 x i32> %8, <4 x i32>* bitcast ([4 x i32]* @f to <4 x i32>*)
26  ret void
27}
28
29