1# RUN: llvm-mc -triple=aarch64 -mattr=+fp-armv8 -disassemble < %s 2>&1 | FileCheck %s
2# RUN: llvm-mc -triple=arm64 -mattr=+fp-armv8 -disassemble < %s 2>&1 | FileCheck %s
3
4#------------------------------------------------------------------------------
5# Load-store exclusive
6#------------------------------------------------------------------------------
7
8#ldxp x14, x14, [sp]
90xee 0x3b 0x7f 0xc8
10#CHECK: warning: potentially undefined instruction encoding
11#CHECK-NEXT: 0xee 0x3b 0x7f 0xc8
12
13#ldaxp w19, w19, [x1]
140x33 0xcc 0x7f 0x88
15#CHECK: warning: potentially undefined instruction encoding
16#CHECK-NEXT: 0x33 0xcc 0x7f 0x88
17
18#------------------------------------------------------------------------------
19# Load-store register (immediate post-indexed)
20#------------------------------------------------------------------------------
21
220x63 0x44 0x40 0xf8
23#CHECK: warning: potentially undefined instruction encoding
24#CHECK-NEXT: 0x63 0x44 0x40 0xf8
25
260x42 0x14 0xc0 0x38
27#CHECK: warning: potentially undefined instruction encoding
28#CHECK-NEXT: 0x42 0x14 0xc0 0x38
29
30#------------------------------------------------------------------------------
31# Load-store register (immediate pre-indexed)
32#------------------------------------------------------------------------------
33
340x63 0x4c 0x40 0xf8
35#CHECK: warning: potentially undefined instruction encoding
36#CHECK-NEXT: 0x63 0x4c 0x40 0xf8
37
380x42 0x1c 0xc0 0x38
39#CHECK: warning: potentially undefined instruction encoding
40#CHECK-NEXT: 0x42 0x1c 0xc0 0x38
41
42#------------------------------------------------------------------------------
43# Load-store register pair (offset)
44#------------------------------------------------------------------------------
45
46# Unpredictable if Rt == Rt2 on a load.
47
480xe3 0x0f 0x40 0xa9
49# CHECK:  warning: potentially undefined instruction encoding
50# CHECK-NEXT: 0xe3 0x0f 0x40 0xa9
51# CHECK-NEXT: ^
52
530xe2 0x8b 0x41 0x69
54# CHECK: warning: potentially undefined instruction encoding
55# CHECK-NEXT: 0xe2 0x8b 0x41 0x69
56# CHECK-NEXT: ^
57
580x82 0x88 0x40 0x2d
59# CHECK: warning: potentially undefined instruction encoding
60# CHECK-NEXT: 0x82 0x88 0x40 0x2d
61# CHECK-NEXT: ^
62
63#------------------------------------------------------------------------------
64# Load-store register pair (post-indexed)
65#------------------------------------------------------------------------------
66
67# Unpredictable if Rt == Rt2 on a load.
68
690xe3 0x0f 0xc0 0xa8
70# CHECK:  warning: potentially undefined instruction encoding
71# CHECK-NEXT: 0xe3 0x0f 0xc0 0xa8
72# CHECK-NEXT: ^
73
740xe2 0x8b 0xc1 0x68
75# CHECK: warning: potentially undefined instruction encoding
76# CHECK-NEXT: 0xe2 0x8b 0xc1 0x68
77# CHECK-NEXT: ^
78
790x82 0x88 0xc0 0x2c
80# CHECK: warning: potentially undefined instruction encoding
81# CHECK-NEXT: 0x82 0x88 0xc0 0x2c
82# CHECK-NEXT: ^
83
84# Also unpredictable if writeback clashes with either transfer register
85
860x63 0x94 0xc0 0xa8
87# CHECK: warning: potentially undefined instruction encoding
88# CHECK-NEXT: 0x63 0x94 0xc0 0xa8
89
900x69 0x2d 0x81 0xa8
91# CHECK: warning: potentially undefined instruction encoding
92# CHECK-NEXT: 0x69 0x2d 0x81 0xa8
93
940x29 0xad 0xc0 0x28
95# CHECK: warning: potentially undefined instruction encoding
96# CHECK-NEXT: 0x29 0xad 0xc0 0x28
97
98