1# RUN: llvm-mc -triple=thumbv8 -disassemble < %s | FileCheck %s
2# CHECK: sevl
3# CHECK: sevl.w
40x50 0xbf
50xaf 0xf3 0x05 0x80
6
7
8# These are the only coprocessor instructions that remain defined in ARMv8
9# (The operations on p10/p11 disassemble into FP/NEON instructions)
10
110x00 0xee 0x10 0x0e
12# CHECK: mcr p14
13
140x00 0xee 0x10 0x0f
15# CHECK: mcr p15
16
170x10 0xee 0x10 0x0e
18# CHECK: mrc p14
19
200x10 0xee 0x10 0x0f
21# CHECK: mrc p15
22
230x40 0xec 0x00 0x0e
24# CHECK: mcrr p14
25
260x40 0xec 0x00 0x0f
27# CHECK: mcrr p15
28
290x50 0xec 0x00 0x0e
30# CHECK: mrrc p14
31
320x50 0xec 0x00 0x0f
33# CHECK: mrrc p15
34
350x80 0xec 0x00 0x0e
36# CHECK: stc p14
37
380x90 0xec 0x00 0x0e
39# CHECK: ldc p14
40
41