1; RUN: opt < %s -instcombine -S | FileCheck %s
2
3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
4target triple = "x86_64-apple-darwin10.0.0"
5
6; Bitcasts between vectors and scalars are valid.
7; PR4487
8define i32 @test1(i64 %a) {
9        %t1 = bitcast i64 %a to <2 x i32>
10        %t2 = bitcast i64 %a to <2 x i32>
11        %t3 = xor <2 x i32> %t1, %t2
12        %t4 = extractelement <2 x i32> %t3, i32 0
13        ret i32 %t4
14
15; CHECK-LABEL: @test1(
16; CHECK: ret i32 0
17}
18
19; Optimize bitcasts that are extracting low element of vector.  This happens
20; because of SRoA.
21; rdar://7892780
22define float @test2(<2 x float> %A, <2 x i32> %B) {
23  %tmp28 = bitcast <2 x float> %A to i64  ; <i64> [#uses=2]
24  %tmp23 = trunc i64 %tmp28 to i32                ; <i32> [#uses=1]
25  %tmp24 = bitcast i32 %tmp23 to float            ; <float> [#uses=1]
26
27  %tmp = bitcast <2 x i32> %B to i64
28  %tmp2 = trunc i64 %tmp to i32                ; <i32> [#uses=1]
29  %tmp4 = bitcast i32 %tmp2 to float            ; <float> [#uses=1]
30
31  %add = fadd float %tmp24, %tmp4
32  ret float %add
33
34; CHECK-LABEL: @test2(
35; CHECK-NEXT:  %tmp24 = extractelement <2 x float> %A, i32 0
36; CHECK-NEXT:  bitcast <2 x i32> %B to <2 x float>
37; CHECK-NEXT:  %tmp4 = extractelement <2 x float> {{.*}}, i32 0
38; CHECK-NEXT:  %add = fadd float %tmp24, %tmp4
39; CHECK-NEXT:  ret float %add
40}
41
42; Optimize bitcasts that are extracting other elements of a vector.  This
43; happens because of SRoA.
44; rdar://7892780
45define float @test3(<2 x float> %A, <2 x i64> %B) {
46  %tmp28 = bitcast <2 x float> %A to i64
47  %tmp29 = lshr i64 %tmp28, 32
48  %tmp23 = trunc i64 %tmp29 to i32
49  %tmp24 = bitcast i32 %tmp23 to float
50
51  %tmp = bitcast <2 x i64> %B to i128
52  %tmp1 = lshr i128 %tmp, 64
53  %tmp2 = trunc i128 %tmp1 to i32
54  %tmp4 = bitcast i32 %tmp2 to float
55
56  %add = fadd float %tmp24, %tmp4
57  ret float %add
58
59; CHECK-LABEL: @test3(
60; CHECK-NEXT:  %tmp24 = extractelement <2 x float> %A, i32 1
61; CHECK-NEXT:  bitcast <2 x i64> %B to <4 x float>
62; CHECK-NEXT:  %tmp4 = extractelement <4 x float> {{.*}}, i32 2
63; CHECK-NEXT:  %add = fadd float %tmp24, %tmp4
64; CHECK-NEXT:  ret float %add
65}
66
67
68define <2 x i32> @test4(i32 %A, i32 %B){
69  %tmp38 = zext i32 %A to i64
70  %tmp32 = zext i32 %B to i64
71  %tmp33 = shl i64 %tmp32, 32
72  %ins35 = or i64 %tmp33, %tmp38
73  %tmp43 = bitcast i64 %ins35 to <2 x i32>
74  ret <2 x i32> %tmp43
75  ; CHECK-LABEL: @test4(
76  ; CHECK-NEXT: insertelement <2 x i32> undef, i32 %A, i32 0
77  ; CHECK-NEXT: insertelement <2 x i32> {{.*}}, i32 %B, i32 1
78  ; CHECK-NEXT: ret <2 x i32>
79
80}
81
82; rdar://8360454
83define <2 x float> @test5(float %A, float %B) {
84  %tmp37 = bitcast float %A to i32
85  %tmp38 = zext i32 %tmp37 to i64
86  %tmp31 = bitcast float %B to i32
87  %tmp32 = zext i32 %tmp31 to i64
88  %tmp33 = shl i64 %tmp32, 32
89  %ins35 = or i64 %tmp33, %tmp38
90  %tmp43 = bitcast i64 %ins35 to <2 x float>
91  ret <2 x float> %tmp43
92  ; CHECK-LABEL: @test5(
93  ; CHECK-NEXT: insertelement <2 x float> undef, float %A, i32 0
94  ; CHECK-NEXT: insertelement <2 x float> {{.*}}, float %B, i32 1
95  ; CHECK-NEXT: ret <2 x float>
96}
97
98define <2 x float> @test6(float %A){
99  %tmp23 = bitcast float %A to i32              ; <i32> [#uses=1]
100  %tmp24 = zext i32 %tmp23 to i64                 ; <i64> [#uses=1]
101  %tmp25 = shl i64 %tmp24, 32                     ; <i64> [#uses=1]
102  %mask20 = or i64 %tmp25, 1109917696             ; <i64> [#uses=1]
103  %tmp35 = bitcast i64 %mask20 to <2 x float>     ; <<2 x float>> [#uses=1]
104  ret <2 x float> %tmp35
105; CHECK-LABEL: @test6(
106; CHECK-NEXT: insertelement <2 x float> <float 4.200000e+01, float undef>, float %A, i32 1
107; CHECK: ret
108}
109
110define i64 @ISPC0(i64 %in) {
111  %out = and i64 %in, xor (i64 bitcast (<4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1> to i64), i64 -1)
112  ret i64 %out
113; CHECK-LABEL: @ISPC0(
114; CHECK: ret i64 0
115}
116
117
118define i64 @Vec2(i64 %in) {
119  %out = and i64 %in, xor (i64 bitcast (<4 x i16> <i16 0, i16 0, i16 0, i16 0> to i64), i64 0)
120  ret i64 %out
121; CHECK-LABEL: @Vec2(
122; CHECK: ret i64 0
123}
124
125define i64 @All11(i64 %in) {
126  %out = and i64 %in, xor (i64 bitcast (<2 x float> bitcast (i64 -1 to <2 x float>) to i64), i64 -1)
127  ret i64 %out
128; CHECK-LABEL: @All11(
129; CHECK: ret i64 0
130}
131
132
133define i32 @All111(i32 %in) {
134  %out = and i32 %in, xor (i32 bitcast (<1 x float> bitcast (i32 -1 to <1 x float>) to i32), i32 -1)
135  ret i32 %out
136; CHECK-LABEL: @All111(
137; CHECK: ret i32 0
138}
139
140define <2 x i16> @BitcastInsert(i32 %a) {
141  %v = insertelement <1 x i32> undef, i32 %a, i32 0
142  %r = bitcast <1 x i32> %v to <2 x i16>
143  ret <2 x i16> %r
144; CHECK-LABEL: @BitcastInsert(
145; CHECK: bitcast i32 %a to <2 x i16>
146}
147
148; PR17293
149define <2 x i64> @test7(<2 x i8*>* %arg) nounwind {
150  %cast = bitcast <2 x i8*>* %arg to <2 x i64>*
151  %load = load <2 x i64>* %cast, align 16
152  ret <2 x i64> %load
153; CHECK: @test7
154; CHECK: bitcast
155; CHECK: load
156}
157