1; This test makes sure that these instructions are properly eliminated.
2;
3; RUN: opt < %s -instcombine -S | FileCheck %s
4
5define i32 @test1(i32 %A) {
6; CHECK-LABEL: @test1(
7; CHECK: ret i32 %A
8        %B = shl i32 %A, 0              ; <i32> [#uses=1]
9        ret i32 %B
10}
11
12define i32 @test2(i8 %A) {
13; CHECK-LABEL: @test2(
14; CHECK: ret i32 0
15        %shift.upgrd.1 = zext i8 %A to i32              ; <i32> [#uses=1]
16        %B = shl i32 0, %shift.upgrd.1          ; <i32> [#uses=1]
17        ret i32 %B
18}
19
20define i32 @test3(i32 %A) {
21; CHECK-LABEL: @test3(
22; CHECK: ret i32 %A
23        %B = ashr i32 %A, 0             ; <i32> [#uses=1]
24        ret i32 %B
25}
26
27define i32 @test4(i8 %A) {
28; CHECK-LABEL: @test4(
29; CHECK: ret i32 0
30        %shift.upgrd.2 = zext i8 %A to i32              ; <i32> [#uses=1]
31        %B = ashr i32 0, %shift.upgrd.2         ; <i32> [#uses=1]
32        ret i32 %B
33}
34
35
36define i32 @test5(i32 %A) {
37; CHECK-LABEL: @test5(
38; CHECK: ret i32 undef
39        %B = lshr i32 %A, 32  ;; shift all bits out
40        ret i32 %B
41}
42
43define i32 @test5a(i32 %A) {
44; CHECK-LABEL: @test5a(
45; CHECK: ret i32 undef
46        %B = shl i32 %A, 32     ;; shift all bits out
47        ret i32 %B
48}
49
50define i32 @test5b() {
51; CHECK-LABEL: @test5b(
52; CHECK: ret i32 -1
53        %B = ashr i32 undef, 2  ;; top two bits must be equal, so not undef
54        ret i32 %B
55}
56
57define i32 @test5b2(i32 %A) {
58; CHECK-LABEL: @test5b2(
59; CHECK: ret i32 -1
60        %B = ashr i32 undef, %A  ;; top %A bits must be equal, so not undef
61        ret i32 %B
62}
63
64define i32 @test6(i32 %A) {
65; CHECK-LABEL: @test6(
66; CHECK-NEXT: mul i32 %A, 6
67; CHECK-NEXT: ret i32
68        %B = shl i32 %A, 1      ;; convert to an mul instruction
69        %C = mul i32 %B, 3
70        ret i32 %C
71}
72
73define i32 @test6a(i32 %A) {
74; CHECK-LABEL: @test6a(
75; CHECK-NEXT: mul i32 %A, 6
76; CHECK-NEXT: ret i32
77        %B = mul i32 %A, 3
78        %C = shl i32 %B, 1      ;; convert to an mul instruction
79        ret i32 %C
80}
81
82define i32 @test7(i8 %A) {
83; CHECK-LABEL: @test7(
84; CHECK-NEXT: ret i32 -1
85        %shift.upgrd.3 = zext i8 %A to i32
86        %B = ashr i32 -1, %shift.upgrd.3  ;; Always equal to -1
87        ret i32 %B
88}
89
90;; (A << 5) << 3 === A << 8 == 0
91define i8 @test8(i8 %A) {
92; CHECK-LABEL: @test8(
93; CHECK: ret i8 0
94        %B = shl i8 %A, 5               ; <i8> [#uses=1]
95        %C = shl i8 %B, 3               ; <i8> [#uses=1]
96        ret i8 %C
97}
98
99;; (A << 7) >> 7 === A & 1
100define i8 @test9(i8 %A) {
101; CHECK-LABEL: @test9(
102; CHECK-NEXT: and i8 %A, 1
103; CHECK-NEXT: ret i8
104        %B = shl i8 %A, 7               ; <i8> [#uses=1]
105        %C = lshr i8 %B, 7              ; <i8> [#uses=1]
106        ret i8 %C
107}
108
109;; This transformation is deferred to DAGCombine:
110;; (A >> 7) << 7 === A & 128
111;; The shl may be valuable to scalar evolution.
112define i8 @test10(i8 %A) {
113; CHECK-LABEL: @test10(
114; CHECK-NEXT: and i8 %A, -128
115; CHECK-NEXT: ret i8
116        %B = lshr i8 %A, 7              ; <i8> [#uses=1]
117        %C = shl i8 %B, 7               ; <i8> [#uses=1]
118        ret i8 %C
119}
120
121;; Allow the simplification when the lshr shift is exact.
122define i8 @test10a(i8 %A) {
123; CHECK-LABEL: @test10a(
124; CHECK-NEXT: ret i8 %A
125        %B = lshr exact i8 %A, 7
126        %C = shl i8 %B, 7
127        ret i8 %C
128}
129
130;; This transformation is deferred to DAGCombine:
131;; (A >> 3) << 4 === (A & 0x1F) << 1
132;; The shl may be valuable to scalar evolution.
133define i8 @test11(i8 %A) {
134; CHECK-LABEL: @test11(
135; CHECK: shl i8
136; CHECK-NEXT: ret i8
137        %a = mul i8 %A, 3               ; <i8> [#uses=1]
138        %B = lshr i8 %a, 3              ; <i8> [#uses=1]
139        %C = shl i8 %B, 4               ; <i8> [#uses=1]
140        ret i8 %C
141}
142
143;; Allow the simplification in InstCombine when the lshr shift is exact.
144define i8 @test11a(i8 %A) {
145; CHECK-LABEL: @test11a(
146; CHECK-NEXT: mul i8 %A, 6
147; CHECK-NEXT: ret i8
148        %a = mul i8 %A, 3
149        %B = lshr exact i8 %a, 3
150        %C = shl i8 %B, 4
151        ret i8 %C
152}
153
154;; This is deferred to DAGCombine unless %B is single-use.
155;; (A >> 8) << 8 === A & -256
156define i32 @test12(i32 %A) {
157; CHECK-LABEL: @test12(
158; CHECK-NEXT: and i32 %A, -256
159; CHECK-NEXT: ret i32
160        %B = ashr i32 %A, 8             ; <i32> [#uses=1]
161        %C = shl i32 %B, 8              ; <i32> [#uses=1]
162        ret i32 %C
163}
164
165;; This transformation is deferred to DAGCombine:
166;; (A >> 3) << 4 === (A & -8) * 2
167;; The shl may be valuable to scalar evolution.
168define i8 @test13(i8 %A) {
169; CHECK-LABEL: @test13(
170; CHECK: shl i8
171; CHECK-NEXT: ret i8
172        %a = mul i8 %A, 3               ; <i8> [#uses=1]
173        %B = ashr i8 %a, 3              ; <i8> [#uses=1]
174        %C = shl i8 %B, 4               ; <i8> [#uses=1]
175        ret i8 %C
176}
177
178define i8 @test13a(i8 %A) {
179; CHECK-LABEL: @test13a(
180; CHECK-NEXT: mul i8 %A, 6
181; CHECK-NEXT: ret i8
182        %a = mul i8 %A, 3
183        %B = ashr exact i8 %a, 3
184        %C = shl i8 %B, 4
185        ret i8 %C
186}
187
188;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
189define i32 @test14(i32 %A) {
190; CHECK-LABEL: @test14(
191; CHECK-NEXT: %B = and i32 %A, -19760
192; CHECK-NEXT: or i32 %B, 19744
193; CHECK-NEXT: ret i32
194        %B = lshr i32 %A, 4             ; <i32> [#uses=1]
195        %C = or i32 %B, 1234            ; <i32> [#uses=1]
196        %D = shl i32 %C, 4              ; <i32> [#uses=1]
197        ret i32 %D
198}
199
200;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
201define i32 @test14a(i32 %A) {
202; CHECK-LABEL: @test14a(
203; CHECK-NEXT: and i32 %A, 77
204; CHECK-NEXT: ret i32
205        %B = shl i32 %A, 4              ; <i32> [#uses=1]
206        %C = and i32 %B, 1234           ; <i32> [#uses=1]
207        %D = lshr i32 %C, 4             ; <i32> [#uses=1]
208        ret i32 %D
209}
210
211define i32 @test15(i1 %C) {
212; CHECK-LABEL: @test15(
213; CHECK-NEXT: select i1 %C, i32 12, i32 4
214; CHECK-NEXT: ret i32
215        %A = select i1 %C, i32 3, i32 1         ; <i32> [#uses=1]
216        %V = shl i32 %A, 2              ; <i32> [#uses=1]
217        ret i32 %V
218}
219
220define i32 @test15a(i1 %C) {
221; CHECK-LABEL: @test15a(
222; CHECK-NEXT: select i1 %C, i32 512, i32 128
223; CHECK-NEXT: ret i32
224        %A = select i1 %C, i8 3, i8 1           ; <i8> [#uses=1]
225        %shift.upgrd.4 = zext i8 %A to i32              ; <i32> [#uses=1]
226        %V = shl i32 64, %shift.upgrd.4         ; <i32> [#uses=1]
227        ret i32 %V
228}
229
230define i1 @test16(i32 %X) {
231; CHECK-LABEL: @test16(
232; CHECK-NEXT: and i32 %X, 16
233; CHECK-NEXT: icmp ne i32
234; CHECK-NEXT: ret i1
235        %tmp.3 = ashr i32 %X, 4
236        %tmp.6 = and i32 %tmp.3, 1
237        %tmp.7 = icmp ne i32 %tmp.6, 0
238        ret i1 %tmp.7
239}
240
241define i1 @test17(i32 %A) {
242; CHECK-LABEL: @test17(
243; CHECK-NEXT: and i32 %A, -8
244; CHECK-NEXT: icmp eq i32
245; CHECK-NEXT: ret i1
246        %B = lshr i32 %A, 3             ; <i32> [#uses=1]
247        %C = icmp eq i32 %B, 1234               ; <i1> [#uses=1]
248        ret i1 %C
249}
250
251
252define i1 @test18(i8 %A) {
253; CHECK-LABEL: @test18(
254; CHECK: ret i1 false
255
256        %B = lshr i8 %A, 7              ; <i8> [#uses=1]
257        ;; false
258        %C = icmp eq i8 %B, 123         ; <i1> [#uses=1]
259        ret i1 %C
260}
261
262define i1 @test19(i32 %A) {
263; CHECK-LABEL: @test19(
264; CHECK-NEXT: icmp ult i32 %A, 4
265; CHECK-NEXT: ret i1
266        %B = ashr i32 %A, 2             ; <i32> [#uses=1]
267        ;; (X & -4) == 0
268        %C = icmp eq i32 %B, 0          ; <i1> [#uses=1]
269        ret i1 %C
270}
271
272
273define i1 @test19a(i32 %A) {
274; CHECK-LABEL: @test19a(
275; CHECK-NEXT: icmp ugt i32 %A, -5
276; CHECK-NEXT: ret i1
277        %B = ashr i32 %A, 2             ; <i32> [#uses=1]
278        ;; X >u ~4
279        %C = icmp eq i32 %B, -1         ; <i1> [#uses=1]
280        ret i1 %C
281}
282
283define i1 @test20(i8 %A) {
284; CHECK-LABEL: @test20(
285; CHECK: ret i1 false
286        %B = ashr i8 %A, 7              ; <i8> [#uses=1]
287        ;; false
288        %C = icmp eq i8 %B, 123         ; <i1> [#uses=1]
289        ret i1 %C
290}
291
292define i1 @test21(i8 %A) {
293; CHECK-LABEL: @test21(
294; CHECK-NEXT: and i8 %A, 15
295; CHECK-NEXT: icmp eq i8
296; CHECK-NEXT: ret i1
297        %B = shl i8 %A, 4               ; <i8> [#uses=1]
298        %C = icmp eq i8 %B, -128                ; <i1> [#uses=1]
299        ret i1 %C
300}
301
302define i1 @test22(i8 %A) {
303; CHECK-LABEL: @test22(
304; CHECK-NEXT: and i8 %A, 15
305; CHECK-NEXT: icmp eq i8
306; CHECK-NEXT: ret i1
307        %B = shl i8 %A, 4               ; <i8> [#uses=1]
308        %C = icmp eq i8 %B, 0           ; <i1> [#uses=1]
309        ret i1 %C
310}
311
312define i8 @test23(i32 %A) {
313; CHECK-LABEL: @test23(
314; CHECK-NEXT: trunc i32 %A to i8
315; CHECK-NEXT: ret i8
316
317        ;; casts not needed
318        %B = shl i32 %A, 24             ; <i32> [#uses=1]
319        %C = ashr i32 %B, 24            ; <i32> [#uses=1]
320        %D = trunc i32 %C to i8         ; <i8> [#uses=1]
321        ret i8 %D
322}
323
324define i8 @test24(i8 %X) {
325; CHECK-LABEL: @test24(
326; CHECK-NEXT: and i8 %X, 3
327; CHECK-NEXT: ret i8
328        %Y = and i8 %X, -5              ; <i8> [#uses=1]
329        %Z = shl i8 %Y, 5               ; <i8> [#uses=1]
330        %Q = ashr i8 %Z, 5              ; <i8> [#uses=1]
331        ret i8 %Q
332}
333
334define i32 @test25(i32 %tmp.2, i32 %AA) {
335; CHECK-LABEL: @test25(
336; CHECK-NEXT: and i32 %tmp.2, -131072
337; CHECK-NEXT: add i32 %{{[^,]*}}, %AA
338; CHECK-NEXT: and i32 %{{[^,]*}}, -131072
339; CHECK-NEXT: ret i32
340        %x = lshr i32 %AA, 17           ; <i32> [#uses=1]
341        %tmp.3 = lshr i32 %tmp.2, 17            ; <i32> [#uses=1]
342        %tmp.5 = add i32 %tmp.3, %x             ; <i32> [#uses=1]
343        %tmp.6 = shl i32 %tmp.5, 17             ; <i32> [#uses=1]
344        ret i32 %tmp.6
345}
346
347;; handle casts between shifts.
348define i32 @test26(i32 %A) {
349; CHECK-LABEL: @test26(
350; CHECK-NEXT: and i32 %A, -2
351; CHECK-NEXT: ret i32
352        %B = lshr i32 %A, 1             ; <i32> [#uses=1]
353        %C = bitcast i32 %B to i32              ; <i32> [#uses=1]
354        %D = shl i32 %C, 1              ; <i32> [#uses=1]
355        ret i32 %D
356}
357
358
359define i1 @test27(i32 %x) nounwind {
360; CHECK-LABEL: @test27(
361; CHECK-NEXT: and i32 %x, 8
362; CHECK-NEXT: icmp ne i32
363; CHECK-NEXT: ret i1
364  %y = lshr i32 %x, 3
365  %z = trunc i32 %y to i1
366  ret i1 %z
367}
368
369define i8 @test28(i8 %x) {
370entry:
371; CHECK-LABEL: @test28(
372; CHECK:     icmp slt i8 %x, 0
373; CHECK-NEXT:     br i1
374	%tmp1 = lshr i8 %x, 7
375	%cond1 = icmp ne i8 %tmp1, 0
376	br i1 %cond1, label %bb1, label %bb2
377
378bb1:
379	ret i8 0
380
381bb2:
382	ret i8 1
383}
384
385define i8 @test28a(i8 %x, i8 %y) {
386entry:
387; This shouldn't be transformed.
388; CHECK-LABEL: @test28a(
389; CHECK:     %tmp1 = lshr i8 %x, 7
390; CHECK:     %cond1 = icmp eq i8 %tmp1, 0
391; CHECK:     br i1 %cond1, label %bb2, label %bb1
392	%tmp1 = lshr i8 %x, 7
393	%cond1 = icmp ne i8 %tmp1, 0
394	br i1 %cond1, label %bb1, label %bb2
395bb1:
396	ret i8 %tmp1
397bb2:
398        %tmp2 = add i8 %tmp1, %y
399	ret i8 %tmp2
400}
401
402
403define i32 @test29(i64 %d18) {
404entry:
405	%tmp916 = lshr i64 %d18, 32
406	%tmp917 = trunc i64 %tmp916 to i32
407	%tmp10 = lshr i32 %tmp917, 31
408	ret i32 %tmp10
409; CHECK-LABEL: @test29(
410; CHECK:  %tmp916 = lshr i64 %d18, 63
411; CHECK:  %tmp10 = trunc i64 %tmp916 to i32
412}
413
414
415define i32 @test30(i32 %A, i32 %B, i32 %C) {
416	%X = shl i32 %A, %C
417	%Y = shl i32 %B, %C
418	%Z = and i32 %X, %Y
419	ret i32 %Z
420; CHECK-LABEL: @test30(
421; CHECK: %X1 = and i32 %A, %B
422; CHECK: %Z = shl i32 %X1, %C
423}
424
425define i32 @test31(i32 %A, i32 %B, i32 %C) {
426	%X = lshr i32 %A, %C
427	%Y = lshr i32 %B, %C
428	%Z = or i32 %X, %Y
429	ret i32 %Z
430; CHECK-LABEL: @test31(
431; CHECK: %X1 = or i32 %A, %B
432; CHECK: %Z = lshr i32 %X1, %C
433}
434
435define i32 @test32(i32 %A, i32 %B, i32 %C) {
436	%X = ashr i32 %A, %C
437	%Y = ashr i32 %B, %C
438	%Z = xor i32 %X, %Y
439	ret i32 %Z
440; CHECK-LABEL: @test32(
441; CHECK: %X1 = xor i32 %A, %B
442; CHECK: %Z = ashr i32 %X1, %C
443; CHECK: ret i32 %Z
444}
445
446define i1 @test33(i32 %X) {
447        %tmp1 = shl i32 %X, 7
448        %tmp2 = icmp slt i32 %tmp1, 0
449        ret i1 %tmp2
450; CHECK-LABEL: @test33(
451; CHECK: %tmp1.mask = and i32 %X, 16777216
452; CHECK: %tmp2 = icmp ne i32 %tmp1.mask, 0
453}
454
455define i1 @test34(i32 %X) {
456        %tmp1 = lshr i32 %X, 7
457        %tmp2 = icmp slt i32 %tmp1, 0
458        ret i1 %tmp2
459; CHECK-LABEL: @test34(
460; CHECK: ret i1 false
461}
462
463define i1 @test35(i32 %X) {
464        %tmp1 = ashr i32 %X, 7
465        %tmp2 = icmp slt i32 %tmp1, 0
466        ret i1 %tmp2
467; CHECK-LABEL: @test35(
468; CHECK: %tmp2 = icmp slt i32 %X, 0
469; CHECK: ret i1 %tmp2
470}
471
472define i128 @test36(i128 %A, i128 %B) {
473entry:
474  %tmp27 = shl i128 %A, 64
475  %tmp23 = shl i128 %B, 64
476  %ins = or i128 %tmp23, %tmp27
477  %tmp45 = lshr i128 %ins, 64
478  ret i128 %tmp45
479
480; CHECK-LABEL: @test36(
481; CHECK:  %tmp231 = or i128 %B, %A
482; CHECK:  %ins = and i128 %tmp231, 18446744073709551615
483; CHECK:  ret i128 %ins
484}
485
486define i64 @test37(i128 %A, i32 %B) {
487entry:
488  %tmp27 = shl i128 %A, 64
489  %tmp22 = zext i32 %B to i128
490  %tmp23 = shl i128 %tmp22, 96
491  %ins = or i128 %tmp23, %tmp27
492  %tmp45 = lshr i128 %ins, 64
493  %tmp46 = trunc i128 %tmp45 to i64
494  ret i64 %tmp46
495
496; CHECK-LABEL: @test37(
497; CHECK:  %tmp23 = shl nuw nsw i128 %tmp22, 32
498; CHECK:  %ins = or i128 %tmp23, %A
499; CHECK:  %tmp46 = trunc i128 %ins to i64
500}
501
502define i32 @test38(i32 %x) nounwind readnone {
503  %rem = srem i32 %x, 32
504  %shl = shl i32 1, %rem
505  ret i32 %shl
506; CHECK-LABEL: @test38(
507; CHECK-NEXT: and i32 %x, 31
508; CHECK-NEXT: shl i32 1
509; CHECK-NEXT: ret i32
510}
511
512; <rdar://problem/8756731>
513; CHECK-LABEL: @test39(
514define i8 @test39(i32 %a0) {
515entry:
516  %tmp4 = trunc i32 %a0 to i8
517; CHECK: and i8 %tmp49, 64
518  %tmp5 = shl i8 %tmp4, 5
519  %tmp48 = and i8 %tmp5, 32
520  %tmp49 = lshr i8 %tmp48, 5
521  %tmp50 = mul i8 %tmp49, 64
522  %tmp51 = xor i8 %tmp50, %tmp5
523  %tmp52 = and i8 %tmp51, -128
524  %tmp53 = lshr i8 %tmp52, 7
525  %tmp54 = mul i8 %tmp53, 16
526; CHECK: %0 = shl i8 %tmp4, 2
527; CHECK: %tmp54 = and i8 %0, 16
528  %tmp55 = xor i8 %tmp54, %tmp51
529; CHECK: ret i8 %tmp551
530  ret i8 %tmp55
531}
532
533; PR9809
534define i32 @test40(i32 %a, i32 %b) nounwind {
535  %shl1 = shl i32 1, %b
536  %shl2 = shl i32 %shl1, 2
537  %div = udiv i32 %a, %shl2
538  ret i32 %div
539; CHECK-LABEL: @test40(
540; CHECK-NEXT: add i32 %b, 2
541; CHECK-NEXT: lshr i32 %a
542; CHECK-NEXT: ret i32
543}
544
545define i32 @test41(i32 %a, i32 %b) nounwind {
546  %1 = shl i32 1, %b
547  %2 = shl i32 %1, 3
548  ret i32 %2
549; CHECK-LABEL: @test41(
550; CHECK-NEXT: shl i32 8, %b
551; CHECK-NEXT: ret i32
552}
553
554define i32 @test42(i32 %a, i32 %b) nounwind {
555  %div = lshr i32 4096, %b    ; must be exact otherwise we'd divide by zero
556  %div2 = udiv i32 %a, %div
557  ret i32 %div2
558; CHECK-LABEL: @test42(
559; CHECK-NEXT: lshr exact i32 4096, %b
560}
561
562define i32 @test43(i32 %a, i32 %b) nounwind {
563  %div = shl i32 4096, %b    ; must be exact otherwise we'd divide by zero
564  %div2 = udiv i32 %a, %div
565  ret i32 %div2
566; CHECK-LABEL: @test43(
567; CHECK-NEXT: add i32 %b, 12
568; CHECK-NEXT: lshr
569; CHECK-NEXT: ret
570}
571
572define i32 @test44(i32 %a) nounwind {
573  %y = shl nuw i32 %a, 1
574  %z = shl i32 %y, 4
575  ret i32 %z
576; CHECK-LABEL: @test44(
577; CHECK-NEXT: %y = shl i32 %a, 5
578; CHECK-NEXT: ret i32 %y
579}
580
581define i32 @test45(i32 %a) nounwind {
582  %y = lshr exact i32 %a, 1
583  %z = lshr i32 %y, 4
584  ret i32 %z
585; CHECK-LABEL: @test45(
586; CHECK-NEXT: %y = lshr i32 %a, 5
587; CHECK-NEXT: ret i32 %y
588}
589
590define i32 @test46(i32 %a) {
591  %y = ashr exact i32 %a, 3
592  %z = shl i32 %y, 1
593  ret i32 %z
594; CHECK-LABEL: @test46(
595; CHECK-NEXT: %z = ashr exact i32 %a, 2
596; CHECK-NEXT: ret i32 %z
597}
598
599define i32 @test47(i32 %a) {
600  %y = lshr exact i32 %a, 3
601  %z = shl i32 %y, 1
602  ret i32 %z
603; CHECK-LABEL: @test47(
604; CHECK-NEXT: %z = lshr exact i32 %a, 2
605; CHECK-NEXT: ret i32 %z
606}
607
608define i32 @test48(i32 %x) {
609  %A = lshr exact i32 %x, 1
610  %B = shl i32 %A, 3
611  ret i32 %B
612; CHECK-LABEL: @test48(
613; CHECK-NEXT: %B = shl i32 %x, 2
614; CHECK-NEXT: ret i32 %B
615}
616
617define i32 @test49(i32 %x) {
618  %A = ashr exact i32 %x, 1
619  %B = shl i32 %A, 3
620  ret i32 %B
621; CHECK-LABEL: @test49(
622; CHECK-NEXT: %B = shl i32 %x, 2
623; CHECK-NEXT: ret i32 %B
624}
625
626define i32 @test50(i32 %x) {
627  %A = shl nsw i32 %x, 1
628  %B = ashr i32 %A, 3
629  ret i32 %B
630; CHECK-LABEL: @test50(
631; CHECK-NEXT: %B = ashr i32 %x, 2
632; CHECK-NEXT: ret i32 %B
633}
634
635define i32 @test51(i32 %x) {
636  %A = shl nuw i32 %x, 1
637  %B = lshr i32 %A, 3
638  ret i32 %B
639; CHECK-LABEL: @test51(
640; CHECK-NEXT: %B = lshr i32 %x, 2
641; CHECK-NEXT: ret i32 %B
642}
643
644define i32 @test52(i32 %x) {
645  %A = shl nsw i32 %x, 3
646  %B = ashr i32 %A, 1
647  ret i32 %B
648; CHECK-LABEL: @test52(
649; CHECK-NEXT: %B = shl nsw i32 %x, 2
650; CHECK-NEXT: ret i32 %B
651}
652
653define i32 @test53(i32 %x) {
654  %A = shl nuw i32 %x, 3
655  %B = lshr i32 %A, 1
656  ret i32 %B
657; CHECK-LABEL: @test53(
658; CHECK-NEXT: %B = shl nuw i32 %x, 2
659; CHECK-NEXT: ret i32 %B
660}
661
662define i32 @test54(i32 %x) {
663  %shr2 = lshr i32 %x, 1
664  %shl = shl i32 %shr2, 4
665  %and = and i32 %shl, 16
666  ret i32 %and
667; CHECK-LABEL: @test54(
668; CHECK: shl i32 %x, 3
669}
670
671
672define i32 @test55(i32 %x) {
673  %shr2 = lshr i32 %x, 1
674  %shl = shl i32 %shr2, 4
675  %or = or i32 %shl, 8
676  ret i32 %or
677; CHECK-LABEL: @test55(
678; CHECK: shl i32 %x, 3
679}
680
681define i32 @test56(i32 %x) {
682  %shr2 = lshr i32 %x, 1
683  %shl = shl i32 %shr2, 4
684  %or = or i32 %shl, 7
685  ret i32 %or
686; CHECK-LABEL: @test56(
687; CHECK: shl i32 %shr2, 4
688}
689
690
691define i32 @test57(i32 %x) {
692  %shr = lshr i32 %x, 1
693  %shl = shl i32 %shr, 4
694  %and = and i32 %shl, 16
695  ret i32 %and
696; CHECK-LABEL: @test57(
697; CHECK: shl i32 %x, 3
698}
699
700define i32 @test58(i32 %x) {
701  %shr = lshr i32 %x, 1
702  %shl = shl i32 %shr, 4
703  %or = or i32 %shl, 8
704  ret i32 %or
705; CHECK-LABEL: @test58(
706; CHECK: shl i32 %x, 3
707}
708
709define i32 @test59(i32 %x) {
710  %shr = ashr i32 %x, 1
711  %shl = shl i32 %shr, 4
712  %or = or i32 %shl, 7
713  ret i32 %or
714; CHECK-LABEL: @test59(
715; CHECK: %shl = shl i32 %shr1, 4
716}
717
718
719define i32 @test60(i32 %x) {
720  %shr = ashr i32 %x, 4
721  %shl = shl i32 %shr, 1
722  %or = or i32 %shl, 1
723  ret i32 %or
724; CHECK-LABEL: @test60(
725; CHECK: ashr i32 %x, 3
726}
727
728
729define i32 @test61(i32 %x) {
730  %shr = ashr i32 %x, 4
731  %shl = shl i32 %shr, 1
732  %or = or i32 %shl, 2
733  ret i32 %or
734; CHECK-LABEL: @test61(
735; CHECK: ashr i32 %x, 4
736}
737
738; propagate "exact" trait
739define i32 @test62(i32 %x) {
740  %shr = ashr exact i32 %x, 4
741  %shl = shl i32 %shr, 1
742  %or = or i32 %shl, 1
743  ret i32 %or
744; CHECK-LABEL: @test62(
745; CHECK: ashr exact i32 %x, 3
746}
747
748; PR17026
749; CHECK-LABEL: @test63(
750; CHECK-NOT: sh
751; CHECK: ret
752define void @test63(i128 %arg) {
753bb:
754  br i1 undef, label %bb1, label %bb12
755
756bb1:                                              ; preds = %bb11, %bb
757  br label %bb2
758
759bb2:                                              ; preds = %bb7, %bb1
760  br i1 undef, label %bb3, label %bb7
761
762bb3:                                              ; preds = %bb2
763  %tmp = lshr i128 %arg, 36893488147419103232
764  %tmp4 = shl i128 %tmp, 0
765  %tmp5 = or i128 %tmp4, undef
766  %tmp6 = trunc i128 %tmp5 to i16
767  br label %bb8
768
769bb7:                                              ; preds = %bb2
770  br i1 undef, label %bb8, label %bb2
771
772bb8:                                              ; preds = %bb7, %bb3
773  %tmp9 = phi i16 [ %tmp6, %bb3 ], [ undef, %bb7 ]
774  %tmp10 = icmp eq i16 %tmp9, 0
775  br i1 %tmp10, label %bb11, label %bb12
776
777bb11:                                             ; preds = %bb8
778  br i1 undef, label %bb1, label %bb12
779
780bb12:                                             ; preds = %bb11, %bb8, %bb
781  ret void
782}
783