1 #ifndef SRC_H 2 #define SRC_H 3 4 #include "es1371.h" 5 #include "wait.h" 6 7 int SRCInit(DEV_STRUCT * DSP); 8 int SRCRegRead(DEV_STRUCT * DSP, u16_t reg, u16_t *data); 9 int SRCRegWrite(DEV_STRUCT * DSP, u16_t reg, u16_t val); 10 void SRCSetRate(DEV_STRUCT * DSP, char src_base, u16_t rate); 11 12 13 /* register/base and control equates for the SRC RAM */ 14 #define SRC_SYNTH_FIFO 0x00 15 #define SRC_DAC_FIFO 0x20 16 #define SRC_ADC_FIFO 0x40 17 #define SRC_SYNTH_BASE 0x70 18 #define SRC_DAC_BASE 0x74 19 #define SRC_ADC_BASE 0x78 20 #define SRC_SYNTH_LVOL 0x7c 21 #define SRC_SYNTH_RVOL 0x7d 22 #define SRC_DAC_LVOL 0x7e 23 #define SRC_DAC_RVOL 0x7f 24 #define SRC_ADC_LVOL 0x6c 25 #define SRC_ADC_RVOL 0x6d 26 27 #define SRC_TRUNC_N_OFF 0x00 28 #define SRC_INT_REGS_OFF 0x01 29 #define SRC_ACCUM_FRAC_OFF 0x02 30 #define SRC_VFREQ_FRAC_OFF 0x03 31 32 /* miscellaneous control defines */ 33 #define SRC_IOPOLL_COUNT 0x1000UL 34 #define SRC_WENABLE (1UL << 24) 35 #define SRC_BUSY_BIT 23 36 #define SRC_BUSY (1UL << SRC_BUSY_BIT) 37 #define SRC_DISABLE (1UL << 22) 38 #define SRC_SYNTHFREEZE (1UL << 21) 39 #define SRC_DACFREEZE (1UL << 20) 40 #define SRC_ADCFREEZE (1UL << 19) 41 #define SRC_CTLMASK 0x00780000UL 42 43 #endif /* SRC_H */ 44