1 /* 2 i82365.h 3 4 Created: May 1995 by Philip Homburg <philip@cs.vu.nl> 5 */ 6 7 #ifndef I82365_H 8 #define I82365_H 9 10 /* The default I/O ports used by a i82365 are the following: */ 11 #define I365_INDEX 0x3E0 12 #define I365_DATA 0x3E1 13 14 /* The index register is used to select one of the following registers: */ 15 #define I365_REVISION 0x00 /* IDREG */ 16 #define I365R_ID_MASK 0xC0 17 #define I365R_ID_IO 0x00 18 #define I365R_ID_MEM 0x40 19 #define I365R_ID_MEM_IO 0x80 20 #define I365R_RES_MASK 0x30 21 #define I365R_REV_MASK 0x0F 22 23 #define I365_IF_STAT 0x01 /* ISTAT */ 24 #define I365IS_GPI 0x80 25 #define CL6722IS_VPPVALID 0x80 26 #define I365IS_POWER 0x40 27 #define I365IS_READY 0x20 28 #define I365IS_WRTPROT 0x10 29 #define I365IS_CARD_MASK 0x0C 30 #define I365IS_CARD_ABSENT 0x00 31 #define I365IS_CARD_PART_0 0x04 32 #define I365IS_CARD_PART_1 0x08 33 #define I365IS_CARD_PRESENT 0x0C 34 #define I365IS_BAT_MASK 0x03 35 #define I365IS_BAT_LOST_0 0x00 36 #define I365IS_BAT_LOW 0x01 37 #define I365IS_BAT_LOST_1 0x02 38 #define I365IS_BAT_OKAY 0x03 39 40 #define I365_PWR_CTL 0x02 /* PCTRL */ 41 #define I365PC_CARD_EN 0x80 42 #define I365PC_NORESET 0x40 43 #define CL6722PC_COMPAT_0 0x40 44 #define I365PC_AUTO_PWR 0x20 45 #define I365PC_Vcc_MASK 0x18 46 #define I365PC_Vcc_NC 0x00 47 #define I365PC_Vcc_Reserved 0x08 48 #define I365PC_Vcc_5 0x10 49 #define I365PC_Vcc_33 0x18 50 #define CL6722PC_Vcc_PWR 0x10 51 #define CL6722PC_COMPAT_1 0x08 52 #define I365PC_Vpp_MASK 0x03 53 #define I365PC_Vpp_NC 0x00 54 #define CL6722PC_Vpp_ZERO_0 0x00 55 #define I365PC_Vpp_5 0x01 56 #define CL6722PC_Vpp_Vcc 0x01 57 #define I365PC_Vpp_12 0x02 58 #define I365PC_Vpp_Reserved 0x03 59 #define CL6722PC_Vpp_ZERO_1 0x03 60 61 #define I365_INT_GEN_CTL 0x03 62 #define I365IGC_RING_IND 0x80 63 #define I365IGC_RESET 0x40 64 #define I365IGC_CARD_IS_IO 0x20 65 #define I365IGC_EN_MNG_INT 0x10 66 #define I365IGC_IRQ_MASK 0x0F 67 68 #define I365_CRD_STAT_CHG 0x04 /* CSTCH */ 69 #define I365CSC_GPI 0x10 70 #define I365CSC_CARD_DETECT 0x08 71 #define I365CSC_READY 0x04 72 #define I365CSC_BAT_WARN 0x02 73 #define I365CSC_BAT_DEAD 0x01 74 75 #define I365_MNG_INT_CONF 0x05 76 #define I365MIC_IRQ_MASK 0xF0 77 #define I365MIC_CARD_DETECT 0x08 78 #define I365MIC_READY 0x04 79 #define I365MIC_BAT_WARN 0x02 80 #define I365MIC_BAT_DEAD 0x01 81 82 #define I365_MAP_ENABLE 0x06 /* ADWEN */ 83 #define I365ME_IO_MAP_0 0x40 84 #define I365ME_MEM_MAP_0 0x01 85 86 #define I365_IO_WND_CTL 0x07 87 #define I365IWC_AUTO_1 0x80 88 #define CL6722IWC_TIMING_1 0x80 89 #define I365IWC_0WS_1 0x40 90 #define I365IWC_AUTO_SIZE_1 0x20 91 #define I365IWC_IO_SIZE_1 0x10 92 #define I365IWC_WAIT_0 0x08 93 #define I365IWC_0WS_0 0x04 94 #define CL6722IWC_TIMING_0 0x08 95 #define I365IWC_AUTO_SIZE_0 0x02 96 #define I365IWC_IO_SIZE_0 0x01 97 98 #define I365_IO_0_START_LOW 0x08 99 #define I365_IO_0_START_HIGH 0x09 100 #define I365_IO_0_END_LOW 0x0A 101 #define I365_IO_0_END_HIGH 0x0B 102 #define I365_IO_1_START_LOW 0x0C 103 #define I365_IO_1_START_HIGH 0x0D 104 #define I365_IO_1_END_LOW 0x0E 105 #define I365_IO_1_END_HIGH 0x0F 106 107 #define I365_MEM_0_START_LOW 0x10 108 #define I365_MEM_0_START_HIGH 0x11 109 #define I365_MEM_0_END_LOW 0x12 110 #define I365_MEM_0_END_HIGH 0x13 111 #define I365_MEM_0_OFF_LOW 0x14 112 #define I365_MEM_0_OFF_HIGH 0x15 113 114 #define CL6722_MISC_CTL_1 0x16 115 #define CL6722_FIFO_CTL 0x17 116 117 #define I365_MEM_1_START_LOW 0x18 118 #define I365_MEM_1_START_HIGH 0x19 119 #define I365_MEM_1_END_LOW 0x1A 120 #define I365_MEM_1_END_HIGH 0x1B 121 #define I365_MEM_1_OFF_LOW 0x1C 122 #define I365_MEM_1_OFF_HIGH 0x1D 123 124 #define CL6722_MISC_CTL_2 0x1E 125 #define CL6722_CHIP_INFO 0x1F 126 #define CL6722CI_ID_MASK 0xC0 127 128 #define I365_MEM_2_START_LOW 0x20 129 #define I365_MEM_2_START_HIGH 0x21 130 #define I365_MEM_2_END_LOW 0x22 131 #define I365_MEM_2_END_HIGH 0x23 132 #define I365_MEM_2_OFF_LOW 0x24 133 #define I365_MEM_2_OFF_HIGH 0x25 134 135 #define CL6722_ATA_CONTROL 0x26 /* CPAGE */ 136 #define I365_RESERVED 0x27 137 138 #define I365_MEM_3_START_LOW 0x28 139 #define I365_MEM_3_START_HIGH 0x29 140 #define I365_MEM_3_END_LOW 0x2A 141 #define I365_MEM_3_END_HIGH 0x2B 142 #define I365_MEM_3_OFF_LOW 0x2C 143 #define I365_MEM_3_OFF_HIGH 0x2D 144 145 #define CL6722_EXT_INDEX 0x2E /* CSCTRL */ 146 #define CL6722_EXT_DATA 0x2F 147 148 #define I365_MEM_4_START_LOW 0x30 149 #define I365_MEM_4_START_HIGH 0x31 150 #define I365_MEM_4_END_LOW 0x32 151 #define I365_MEM_4_END_HIGH 0x33 152 #define I365_MEM_4_OFF_LOW 0x34 153 #define I365_MEM_4_OFF_HIGH 0x35 154 155 #define CL6722_IO_0_OFF_LOW 0x36 156 #define CL6722_IO_0_OFF_HIGH 0x37 157 #define CL6722_IO_1_OFF_LOW 0x38 158 #define CL6722_IO_1_OFF_HIGH 0x39 159 160 #define I365_SETUP_TIM_0 0x3A 161 #define I365_CMD_TIM_0 0x3B 162 #define I365_RECOV_TIM_0 0x3C 163 #define I365_SETUP_TIM_1 0x3D 164 #define I365_CMD_TIM_1 0x3E 165 #define I365_RECOV_TIM_1 0x3F 166 167 #endif /* I82365_H */ 168