xref: /minix/minix/drivers/net/dp8390/3c503.c (revision 9f988b79)
1 /*
2  *	3c503.c		A shared memory driver for Etherlink II board.
3  *
4  *	Created:	Dec. 20, 1996 by G. Falzoni <falzoni@marina.scn.de>
5  *
6  *	Inspired by the TNET package by M. Ostrowski, the driver for Linux
7  *	by D. Becker, the Crynwr 3c503 packet driver, and the Amoeba driver.
8  *
9  *	It works in shared memory mode and should be used with the
10  *	device driver for NS 8390 based cards of Minix.  Programmed
11  *	I/O could be used as well but would result in poor performance.
12  */
13 
14 #include <minix/drivers.h>
15 #include <minix/netdriver.h>
16 
17 #include <net/gen/ether.h>
18 #include <net/gen/eth_io.h>
19 
20 #include "local.h"
21 #include "dp8390.h"
22 #include "3c503.h"
23 
24 #if ENABLE_3C503
25 
26 extern u32_t system_hz;
27 
28 #define MILLIS_TO_TICKS(m)  (((m)*system_hz/1000)+1)
29 
30 static void el2_init(dpeth_t *dep);
31 static void el2_stop(dpeth_t *dep);
32 static void milli_delay(unsigned long millis);
33 
34 /*===========================================================================*
35  *				el2_init				     *
36  *===========================================================================*/
37 static void el2_init(dep)
38 dpeth_t * dep;
39 {
40   /* Initalize hardware and data structures. */
41   int ix, irq;
42   int sendq_nr;
43   int cntr;
44 
45   /* Map the address PROM to lower I/O address range */
46   cntr = inb_el2(dep, EL2_CNTR);
47   outb_el2(dep, EL2_CNTR, cntr | ECNTR_SAPROM);
48 
49   /* Read station address from PROM */
50   for (ix = EL2_EA0; ix <= EL2_EA5; ix += 1)
51 	dep->de_address.ea_addr[ix] = inb_el2(dep, ix);
52 
53   /* Map the 8390 back to lower I/O address range */
54   outb_el2(dep, EL2_CNTR, cntr);
55 
56   /* Enable memory, but turn off interrupts until we are ready */
57   outb_el2(dep, EL2_CFGR, ECFGR_IRQOFF);
58 
59   dep->de_data_port = dep->de_dp8390_port = dep->de_base_port;
60   dep->de_prog_IO = 0;		/* Programmed I/O not yet available */
61 
62   /* Check width of data bus:
63    * 1. Write 0 to WTS bit.  The board will drive it to 1 if it is a
64    *    16-bit card.
65    * 2. Select page 2
66    * 3. See if it is a 16-bit card
67    * 4. Select page 0
68    */
69   outb_el2(dep, DP_CR, CR_PS_P0|CR_DM_ABORT|CR_STP);
70   outb_el2(dep, DP_DCR, 0);
71   outb_el2(dep, DP_CR, CR_PS_P2|CR_DM_ABORT|CR_STP);
72   dep->de_16bit = (inb_el2(dep, DP_DCR) & DCR_WTS) != 0;
73   outb_el2(dep, DP_CR, CR_PS_P0|CR_DM_ABORT|CR_STP);
74 
75   /* Allocate one send buffer (1.5KB) per 8KB of on board memory. */
76   sendq_nr = (dep->de_ramsize - dep->de_offset_page) / 0x2000;
77   if (sendq_nr < 1)
78 	sendq_nr = 1;
79   else if (sendq_nr > SENDQ_NR)
80 	sendq_nr = SENDQ_NR;
81 
82   dep->de_sendq_nr = sendq_nr;
83   for (ix = 0; ix < sendq_nr; ix++)
84 	dep->de_sendq[ix].sq_sendpage = (ix * SENDQ_PAGES) + EL2_SM_START_PG;
85 
86   dep->de_startpage = (ix * SENDQ_PAGES) + EL2_SM_START_PG;
87   dep->de_stoppage = EL2_SM_STOP_PG;
88 
89   outb_el2(dep, EL2_STARTPG, dep->de_startpage);
90   outb_el2(dep, EL2_STOPPG, dep->de_stoppage);
91 
92   /* Point the vector pointer registers somewhere ?harmless?. */
93   outb_el2(dep, EL2_VP2, 0xFF);	/* Point at the ROM restart location    */
94   outb_el2(dep, EL2_VP1, 0xFF);	/* 0xFFFF:0000  (from original sources) */
95   outb_el2(dep, EL2_VP0, 0x00);	/*           - What for protected mode? */
96 
97   /* Set interrupt level for 3c503 */
98   irq = (dep->de_irq &= ~DEI_DEFAULT);	/* Strip the default flag. */
99   if (irq == 9) irq = 2;
100   if (irq < 2 || irq > 5) panic("bad 3c503 irq configuration: %d", irq);
101   outb_el2(dep, EL2_IDCFG, (0x04 << irq));
102 
103   outb_el2(dep, EL2_DRQCNT, 0x08);	/* Set burst size to 8 */
104   outb_el2(dep, EL2_DMAAH, EL2_SM_START_PG);	/* Put start of TX  */
105   outb_el2(dep, EL2_DMAAL, 0x00);	/* buffer in the GA DMA reg */
106 
107   outb_el2(dep, EL2_CFGR, ECFGR_NORM);	/* Enable shared memory */
108 
109   if (!debug) {
110 	printf("%s: 3c503 at %X:%d:%lX\n",
111 		dep->de_name, dep->de_base_port, dep->de_irq,
112 		dep->de_linmem + dep->de_offset_page);
113   } else {
114 	printf("%s: 3Com Etherlink II %sat I/O address 0x%X, "
115 			"memory address 0x%lX, irq %d\n",
116 		dep->de_name, dep->de_16bit ? "(16-bit) " : "",
117 		dep->de_base_port,
118 		dep->de_linmem + dep->de_offset_page,
119 		dep->de_irq);
120   }
121 }
122 
123 /*===========================================================================*
124  *				el2_stop				     *
125  *===========================================================================*/
126 static void el2_stop(dep)
127 dpeth_t * dep;
128 {
129   /* Stops board by disabling interrupts. */
130 
131 #if DEBUG
132   printf("%s: stopping Etherlink\n", dep->de_name);
133 #endif
134   outb_el2(dep, EL2_CFGR, ECFGR_IRQOFF);
135   return;
136 }
137 
138 /*===========================================================================*
139  *				el2_probe				     *
140  *===========================================================================*/
141 int el2_probe(dep)
142 dpeth_t * dep;
143 {
144   /* Probe for the presence of an EtherLink II card.  Initialize memory
145    * addressing if card detected.
146    */
147   int iobase, membase;
148   int thin;
149 
150   /* Thin ethernet or AUI? */
151   thin = (dep->de_linmem & 1) ? ECNTR_AUI : ECNTR_THIN;
152 
153   /* Location registers should have 1 bit set */
154   if (!(iobase = inb_el2(dep, EL2_IOBASE))) return 0;
155   if (!((membase = inb_el2(dep, EL2_MEMBASE)) & 0xF0)) return 0;
156   if ((iobase & (iobase - 1)) || (membase & (membase - 1))) return 0;
157 
158   /* Resets board */
159   outb_el2(dep, EL2_CNTR, ECNTR_RESET | thin);
160   milli_delay(1);
161   outb_el2(dep, EL2_CNTR, thin);
162   milli_delay(5);
163 
164   /* Map the address PROM to lower I/O address range */
165   outb_el2(dep, EL2_CNTR, ECNTR_SAPROM | thin);
166   if (inb_el2(dep, EL2_EA0) != 0x02 ||	/* Etherlink II Station address */
167       inb_el2(dep, EL2_EA1) != 0x60 ||	/* MUST be 02:60:8c:xx:xx:xx */
168       inb_el2(dep, EL2_EA2) != 0x8C)
169 	return 0;		/* No Etherlink board at this address */
170 
171   /* Map the 8390 back to lower I/O address range */
172   outb_el2(dep, EL2_CNTR, thin);
173 
174   /* Setup shared memory addressing for 3c503 */
175   dep->de_linmem = ((membase & 0xC0) ? EL2_BASE_0D8000 : EL2_BASE_0C8000) +
176 	((membase & 0xA0) ? (EL2_BASE_0CC000 - EL2_BASE_0C8000) : 0x0000);
177   dep->de_offset_page = (EL2_SM_START_PG * DP_PAGESIZE);
178   dep->de_ramsize = (EL2_SM_STOP_PG - EL2_SM_START_PG) * DP_PAGESIZE;
179 
180   /* (Bad kludge, something Philip needs to look into. -- kjb) */
181   dep->de_linmem -= dep->de_offset_page;
182   dep->de_ramsize += dep->de_offset_page;
183 
184   /* Board initialization and stop functions */
185   dep->de_initf = el2_init;
186   dep->de_stopf = el2_stop;
187   return 1;
188 }
189 
190 static void milli_delay(unsigned long millis)
191 {
192 	tickdelay(MILLIS_TO_TICKS(millis));
193 }
194 
195 #endif /* ENABLE_3C503 */
196 
197 /** 3c503.c **/
198 
199 /*
200  * $PchId: 3c503.c,v 1.3 2003/09/10 15:33:04 philip Exp $
201  */
202