1 /* Definitions of several known BIOS addresses. The addresses listed here 2 * are found in three memory areas that have been defined in <ibm/memory.h>. 3 * - the BIOS interrupt vectors 4 * - the BIOS data area 5 * - the motherboard BIOS memory 6 * 7 * Created: March 2005, Jorrit N. Herder 8 */ 9 10 #ifndef _BIOS_H 11 #define _BIOS_H 12 13 /* PART I -- 14 * The BIOS interrupt vector table (IVT) area (1024 B as of address 0x0000). 15 * Although this area holds 256 interrupt vectors (with jump addresses), some 16 * vectors actually contain important BIOS data. Some addresses are below. 17 */ 18 #define BIOS_EQUIP_CHECK_ADDR 0x0044 19 #define BIOS_EQUIP_CHECK_SIZE 4L 20 21 #define BIOS_VIDEO_PARAMS_ADDR 0x0074 22 #define BIOS_VIDEO_PARAMS_SIZE 4L 23 24 #define BIOS_FLOP_PARAMS_ADDR 0x0078 25 #define BIOS_FLOP_PARAMS_SIZE 4L 26 27 #define BIOS_HD0_PARAMS_ADDR 0x0104 /* disk 0 parameters */ 28 #define BIOS_HD0_PARAMS_SIZE 4L 29 30 #define BIOS_HD1_PARAMS_ADDR 0x0118 /* disk 1 parameters */ 31 #define BIOS_HD1_PARAMS_SIZE 4L 32 33 /* PART I -- 34 * Addresses in the BIOS data area (256 B as of address 0x0400). The addresses 35 * listed below are the most important ones, and the ones that are currently 36 * used. Other addresses may be defined below when new features are added. 37 */ 38 39 /* Serial ports (COM1-COM4). */ 40 #define COM1_IO_PORT_ADDR 0x400 /* COM1 port address */ 41 #define COM1_IO_PORT_SIZE 2L 42 #define COM2_IO_PORT_ADDR 0x402 /* COM2 port address */ 43 #define COM2_IO_PORT_SIZE 2L 44 #define COM3_IO_PORT_ADDR 0x404 /* COM3 port address */ 45 #define COM3_IO_PORT_SIZE 2L 46 #define COM4_IO_PORT_ADDR 0x406 /* COM4 port address */ 47 #define COM4_IO_PORT_SIZE 2L 48 49 /* Parallel ports (LPT1-LPT4). */ 50 #define LPT1_IO_PORT_ADDR 0x408 /* LPT1 port address */ 51 #define LPT1_IO_PORT_SIZE 2L 52 #define LPT2_IO_PORT_ADDR 0x40A /* LPT2 port address */ 53 #define LPT2_IO_PORT_SIZE 2L 54 #define LPT3_IO_PORT_ADDR 0x40C /* LPT3 port address */ 55 #define LPT3_IO_PORT_SIZE 2L 56 #define LPT4_IO_PORT_ADDR 0x40E /* LPT4 port (except on PS/2) */ 57 #define LPT4_IO_PORT_SIZE 2L 58 59 /* Video controller (VDU). */ 60 #define VDU_SCREEN_COLS_ADDR 0x44A /* VDU nr of screen columns */ 61 #define VDU_SCREEN_COLS_SIZE 2L 62 63 /* Base I/O port address for active 6845 CRT controller. */ 64 #define VDU_CRT_BASE_ADDR 0x463 /* 3B4h = mono, 3D4h = color */ 65 #define VDU_CRT_BASE_SIZE 2L 66 67 /* Soft reset flags to control shutdown. */ 68 #define SOFT_RESET_FLAG_ADDR 0x472 /* soft reset flag on Ctl-Alt-Del */ 69 #define SOFT_RESET_FLAG_SIZE 2L 70 #define STOP_MEM_CHECK 0x1234 /* bypass memory tests & CRT init */ 71 #define PRESERVE_MEMORY 0x4321 /* preserve memory */ 72 #define SYSTEM_SUSPEND 0x5678 /* system suspend */ 73 #define MANUFACTURER_TEST 0x9ABC /* manufacturer test */ 74 #define CONVERTIBLE_POST 0xABCD /* convertible POST loop */ 75 /* ... many other values are used during POST */ 76 77 /* Hard disk parameters. (Also see BIOS interrupt vector table above.) */ 78 #define NR_HD_DRIVES_ADDR 0x475 /* number of hard disk drives */ 79 #define NR_HD_DRIVES_SIZE 1L 80 81 /* Parallel ports (LPT1-LPT4) timeout values. */ 82 #define LPT1_TIMEOUT_ADDR 0x478 /* time-out value for LPT1 */ 83 #define LPT1_TIMEOUT_SIZE 1L 84 #define LPT2_TIMEOUT_ADDR 0x479 /* time-out value for LPT2 */ 85 #define LPT2_TIMEOUT_SIZE 1L 86 #define LPT3_TIMEOUT_ADDR 0x47A /* time-out value for LPT3 */ 87 #define LPT3_TIMEOUT_SIZE 1L 88 #define LPT4_TIMEOUT_ADDR 0x47B /* time-out for LPT4 (except PS/2) */ 89 #define LPT4_TIMEOUT_SIZE 1L 90 91 /* Serial ports (COM1-COM4) timeout values. */ 92 #define COM1_TIMEOUT_ADDR 0x47C /* time-out value for COM1 */ 93 #define COM1_TIMEOUT_SIZE 1L 94 #define COM2_TIMEOUT_ADDR 0x47D /* time-out value for COM2 */ 95 #define COM2_TIMEOUT_SIZE 1L 96 #define COM3_TIMEOUT_ADDR 0x47E /* time-out value for COM3 */ 97 #define COM3_TIMEOUT_SIZE 1L 98 #define COM4_TIMEOUT_ADDR 0x47F /* time-out value for COM4 */ 99 #define COM4_TIMEOUT_SIZE 1L 100 101 /* Video controller (VDU). */ 102 #define VDU_SCREEN_ROWS_ADDR 0x484 /* screen rows (less 1, EGA+)*/ 103 #define VDU_SCREEN_ROWS_SIZE 1L 104 #define VDU_FONTLINES_ADDR 0x485 /* point height of char matrix */ 105 #define VDU_FONTLINES_SIZE 2L 106 107 /* Video controller (VDU). */ 108 #define VDU_VIDEO_MODE_ADDR 0x49A /* current video mode */ 109 #define VDU_VIDEO_MODE_SIZE 1L 110 111 /* PART III -- 112 * The motherboard BIOS memory contains some known values that are currently 113 * in use. Other sections in the upper memory area (UMA) addresses vary in 114 * size and locus and are not further defined here. A rough map is given in 115 * <ibm/memory.h>. 116 */ 117 118 /* Machine ID (we're interested in PS/2 and AT models). */ 119 #define MACHINE_ID_ADDR 0xFFFFE /* BIOS machine ID byte */ 120 #define MACHINE_ID_SIZE 1L 121 #define PS_386_MACHINE 0xF8 /* ID byte for PS/2 modela 70/80 */ 122 #define PC_AT_MACHINE 0xFC /* PC/AT, PC/XT286, PS/2 models 50/60 */ 123 124 #endif /* _BIOS_H */ 125 126