xref: /minix/minix/include/arch/i386/include/vm.h (revision 7f5f010b)
1 #ifndef __SYS_VM_386_H__
2 #define __SYS_VM_386_H__
3 /*
4 i386/vm.h
5 */
6 
7 #define I386_PAGE_SIZE		4096
8 #define I386_BIG_PAGE_SIZE	(I386_PAGE_SIZE*I386_VM_PT_ENTRIES)
9 
10 /* i386 paging constants */
11 #define I386_VM_PRESENT	0x001	/* Page is present */
12 #define I386_VM_WRITE	0x002	/* Read/write access allowed */
13 #define I386_VM_READ	0x000	/* Read access only */
14 #define I386_VM_USER	0x004	/* User access allowed */
15 #define I386_VM_PWT	0x008	/* Write through */
16 #define I386_VM_PCD	0x010	/* Cache disable */
17 #define I386_VM_ACC	0x020	/* Accessed */
18 #define I386_VM_ADDR_MASK 0xFFFFF000 /* physical address */
19 #define I386_VM_ADDR_MASK_4MB 0xFFC00000 /* physical address */
20 #define I386_VM_OFFSET_MASK_4MB 0x003FFFFF /* physical address */
21 
22 /* Page directory specific flags. */
23 #define I386_VM_BIGPAGE	0x080	/* 4MB page */
24 
25 /* Page table specific flags. */
26 #define I386_VM_DIRTY    (1L<< 6)	/* Dirty */
27 #define I386_VM_PS  	 (1L<< 7)	/* Page size. */
28 #define I386_VM_GLOBAL   (1L<< 8)	/* Global. */
29 #define I386_VM_PTAVAIL1 (1L<< 9)	/* Available for use. */
30 #define I386_VM_PTAVAIL2 (1L<<10)	/* Available for use. */
31 #define I386_VM_PTAVAIL3 (1L<<11)	/* Available for use. */
32 
33 #define I386_VM_PT_ENT_SIZE	4	/* Size of a page table entry */
34 #define I386_VM_DIR_ENTRIES	1024	/* Number of entries in a page dir */
35 #define I386_VM_DIR_ENT_SHIFT	22	/* Shift to get entry in page dir. */
36 #define I386_VM_PT_ENT_SHIFT	12	/* Shift to get entry in page table */
37 #define I386_VM_PT_ENT_MASK	0x3FF	/* Mask to get entry in page table */
38 #define I386_VM_PT_ENTRIES	1024	/* Number of entries in a page table */
39 #define I386_VM_PFA_SHIFT	22	/* Page frame address shift */
40 
41 /* CR0 bits */
42 #define I386_CR0_PE		0x00000001	/* Protected mode  */
43 #define I386_CR0_MP		0x00000002	/* Monitor Coprocessor  */
44 #define I386_CR0_EM		0x00000004	/* Emulate  */
45 #define I386_CR0_TS		0x00000008	/* Task Switched  */
46 #define I386_CR0_ET		0x00000010	/* Extension Type  */
47 #define I386_CR0_WP		0x00010000	/* Enable paging */
48 #define I386_CR0_PG		0x80000000	/* Enable paging */
49 
50 /* some CR4 bits */
51 #define I386_CR4_VME		0x00000001	/* Virtual 8086 */
52 #define I386_CR4_PVI		0x00000002	/* Virtual ints */
53 #define I386_CR4_TSD		0x00000004	/* RDTSC privileged */
54 #define I386_CR4_DE		0x00000008	/* Debugging extensions */
55 #define I386_CR4_PSE		0x00000010	/* Page size extensions */
56 #define I386_CR4_PAE		0x00000020	/* Physical addr extens. */
57 #define I386_CR4_MCE		0x00000040	/* Machine check enable */
58 #define I386_CR4_PGE		0x00000080	/* Global page flag enable */
59 
60 /* i386 paging 'functions' */
61 #define I386_VM_PTE(v)	(((v) >> I386_VM_PT_ENT_SHIFT) & I386_VM_PT_ENT_MASK)
62 #define I386_VM_PDE(v)	( (v) >> I386_VM_DIR_ENT_SHIFT)
63 #define I386_VM_PFA(e)	( (e) & I386_VM_ADDR_MASK)
64 #define I386_VM_PAGE(v)	( (v) >> I386_VM_PFA_SHIFT)
65 
66 /* i386 pagefault error code bits */
67 #define I386_VM_PFE_P	0x01	/* Pagefault caused by non-present page.
68 				 * (otherwise protection violation.)
69 				 */
70 #define I386_VM_PFE_W	0x02	/* Caused by write (otherwise read) */
71 #define I386_VM_PFE_U	0x04	/* CPU in user mode (otherwise supervisor) */
72 
73 /* CPUID flags */
74 #define CPUID1_EDX_FPU		(1L)		/* FPU presence */
75 #define CPUID1_EDX_PSE 		(1L <<  3)	/* Page Size Extension */
76 #define CPUID1_EDX_SYSENTER	(1L << 11)	/* Intel SYSENTER */
77 #define CPUID1_EDX_PGE 		(1L << 13)	/* Page Global (bit) Enable */
78 #define CPUID1_EDX_APIC_ON_CHIP (1L << 9)	/* APIC is present on the chip */
79 #define CPUID1_EDX_TSC		(1L << 4)	/* Timestamp counter present */
80 #define CPUID1_EDX_HTT		(1L << 28)	/* Supports HTT */
81 #define CPUID1_EDX_FXSR		(1L << 24)
82 #define CPUID1_EDX_SSE		(1L << 25)
83 #define CPUID1_EDX_SSE2		(1L << 26)
84 #define CPUID1_ECX_SSE3		(1L)
85 #define CPUID1_ECX_SSSE3	(1L << 9)
86 #define CPUID1_ECX_SSE4_1	(1L << 19)
87 #define CPUID1_ECX_SSE4_2	(1L << 20)
88 
89 #define CPUID_EF_EDX_SYSENTER	(1L << 11)	/* Intel SYSENTER */
90 
91 #ifndef __ASSEMBLY__
92 
93 #include <minix/type.h>
94 
95 /* structure used by VM to pass data to the kernel while enabling paging */
96 struct vm_ep_data {
97 	struct mem_map	* mem_map;
98 	vir_bytes	data_seg_limit;
99 };
100 #endif
101 
102 #endif /* __SYS_VM_386_H__ */
103