1 #ifndef _CCNT_H 2 #define _CCNT_H 3 4 /* ARMV7 PMU (performance monitors) */ 5 /* ARM ARM B4.1.116 */ 6 #define PMU_PMCNTENSET_C (1 << 31) /* Enable PMCCNTR cycle counter */ 7 8 /* ARM ARM B4.1.117 PMCR */ 9 #define PMU_PMCR_DP (1 << 5) /* Disable when ev. cnt. prohibited */ 10 #define PMU_PMCR_X (1 << 4) /* Export enable */ 11 #define PMU_PMCR_D (1 << 3) /* Clock divider */ 12 #define PMU_PMCR_C (1 << 2) /* Cycle counter reset */ 13 #define PMU_PMCR_P (1 << 1) /* Event counter reset */ 14 #define PMU_PMCR_E (1 << 0) /* Enable event counters */ 15 16 /* ARM ARM B4.1.119 PMINTENSET */ 17 #define PMU_PMINTENSET_C (1 << 31) /* PMCCNTR overflow int req. enable*/ 18 19 /* ARM ARM B4.1.124 PMUSERENR */ 20 #define PMU_PMUSERENR_EN (1 << 0) /* User mode access enable bit */ 21 22 #endif /* _CCNT_H */ 23