xref: /minix/minix/kernel/arch/earm/phys_memset.S (revision 9f988b79)
1/*	$NetBSD: memset.S,v 1.7 2013/12/02 21:21:33 joerg Exp $	*/
2
3/*
4 * Copyright 2003 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Steve C. Woodford for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *      This product includes software developed for the NetBSD Project by
20 *      Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 *    or promote products derived from this software without specific prior
23 *    written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37/*
38 * Copyright (c) 1995 Mark Brinicombe.
39 * All rights reserved.
40 *
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
43 * are met:
44 * 1. Redistributions of source code must retain the above copyright
45 *    notice, this list of conditions and the following disclaimer.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 *    notice, this list of conditions and the following disclaimer in the
48 *    documentation and/or other materials provided with the distribution.
49 * 3. All advertising materials mentioning features or use of this software
50 *    must display the following acknowledgement:
51 *	This product includes software developed by Mark Brinicombe.
52 * 4. The name of the company nor the name of the author may be used to
53 *    endorse or promote products derived from this software without specific
54 *    prior written permission.
55 *
56 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
57 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
58 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
59 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
60 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
61 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
62 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
66 * SUCH DAMAGE.
67 */
68
69#include <machine/asm.h>
70
71#if 0  && defined(__minix)
72#if defined(__ARM_EABI__) && !defined(_BZERO)
73ENTRY(__aeabi_memset)
74	mov	r3, r1
75	mov	r1, r2
76	mov	r2, r3
77	b	memset
78END(__aeabi_memset)
79STRONG_ALIAS(__aeabi_memset4, __aeabi_memset)
80STRONG_ALIAS(__aeabi_memset8, __aeabi_memset)
81
82ENTRY(__aeabi_memclr)
83	mov	r2, r1
84	mov	r1, #0
85	b	memset
86END(__aeabi_memclr)
87STRONG_ALIAS(__aeabi_memclr4, __aeabi_memclr)
88STRONG_ALIAS(__aeabi_memclr8, __aeabi_memclr)
89#endif
90#endif /* #if 0  && defined(__minix) */
91
92/*
93 * memset: Sets a block of memory to the specified value
94 *
95 * On entry:
96 *   r0 - dest address
97 *   r1 - byte to write
98 *   r2 - number of bytes to write
99 *
100 * On exit:
101 *   r0 - dest address
102 */
103#ifdef _BZERO
104/* LINTSTUB: Func: void bzero(void *, size_t) */
105ENTRY(bzero)
106	mov	r3, #0x00
107#else
108#if defined(__minix)
109/* LINTSTUB: Func: void *phys_memset(void *, int, size_t) */
110ENTRY(phys_memset)
111#else
112/* LINTSTUB: Func: void *memset(void *, int, size_t) */
113ENTRY(memset)
114#endif
115	and	r3, r1, #0xff		/* We deal with bytes */
116	mov	r1, r2
117#endif
118	cmp	r1, #0x04		/* Do we have less than 4 bytes */
119	mov	ip, r0
120	blt	.Lmemset_lessthanfour
121
122	/* Ok first we will word align the address */
123	ands	r2, ip, #0x03		/* Get the bottom two bits */
124	bne	.Lmemset_wordunaligned	/* The address is not word aligned */
125
126	/* We are now word aligned */
127.Lmemset_wordaligned:
128#ifndef _BZERO
129	orr	r3, r3, r3, lsl #8	/* Extend value to 16-bits */
130#endif
131#ifdef _ARM_ARCH_DWORD_OK
132	tst	ip, #0x04		/* Quad-align for Xscale */
133#else
134	cmp	r1, #0x10
135#endif
136#ifndef _BZERO
137	orr	r3, r3, r3, lsl #16	/* Extend value to 32-bits */
138#endif
139#ifdef _ARM_ARCH_DWORD_OK
140	subne	r1, r1, #0x04		/* Quad-align if necessary */
141	strne	r3, [ip], #0x04
142	cmp	r1, #0x10
143#endif
144	blt	.Lmemset_loop4		/* If less than 16 then use words */
145	mov	r2, r3			/* Duplicate data */
146	cmp	r1, #0x80		/* If < 128 then skip the big loop */
147	blt	.Lmemset_loop32
148
149	/* Do 128 bytes at a time */
150.Lmemset_loop128:
151	subs	r1, r1, #0x80
152#ifdef _ARM_ARCH_DWORD_OK
153	strdge	r2, r3, [ip], #0x08
154	strdge	r2, r3, [ip], #0x08
155	strdge	r2, r3, [ip], #0x08
156	strdge	r2, r3, [ip], #0x08
157	strdge	r2, r3, [ip], #0x08
158	strdge	r2, r3, [ip], #0x08
159	strdge	r2, r3, [ip], #0x08
160	strdge	r2, r3, [ip], #0x08
161	strdge	r2, r3, [ip], #0x08
162	strdge	r2, r3, [ip], #0x08
163	strdge	r2, r3, [ip], #0x08
164	strdge	r2, r3, [ip], #0x08
165	strdge	r2, r3, [ip], #0x08
166	strdge	r2, r3, [ip], #0x08
167	strdge	r2, r3, [ip], #0x08
168	strdge	r2, r3, [ip], #0x08
169#else
170	stmiage	ip!, {r2-r3}
171	stmiage	ip!, {r2-r3}
172	stmiage	ip!, {r2-r3}
173	stmiage	ip!, {r2-r3}
174	stmiage	ip!, {r2-r3}
175	stmiage	ip!, {r2-r3}
176	stmiage	ip!, {r2-r3}
177	stmiage	ip!, {r2-r3}
178	stmiage	ip!, {r2-r3}
179	stmiage	ip!, {r2-r3}
180	stmiage	ip!, {r2-r3}
181	stmiage	ip!, {r2-r3}
182	stmiage	ip!, {r2-r3}
183	stmiage	ip!, {r2-r3}
184	stmiage	ip!, {r2-r3}
185	stmiage	ip!, {r2-r3}
186#endif
187	bgt	.Lmemset_loop128
188#if defined(__minix)
189	moveq	r0, #0
190#endif
191	RETc(eq)			/* Zero length so just exit */
192
193	add	r1, r1, #0x80		/* Adjust for extra sub */
194
195	/* Do 32 bytes at a time */
196.Lmemset_loop32:
197	subs	r1, r1, #0x20
198#ifdef _ARM_ARCH_DWORD_OK
199	strdge	r2, r3, [ip], #0x08
200	strdge	r2, r3, [ip], #0x08
201	strdge	r2, r3, [ip], #0x08
202	strdge	r2, r3, [ip], #0x08
203#else
204	stmiage	ip!, {r2-r3}
205	stmiage	ip!, {r2-r3}
206	stmiage	ip!, {r2-r3}
207	stmiage	ip!, {r2-r3}
208#endif
209	bgt	.Lmemset_loop32
210#if defined(__minix)
211	moveq	r0, #0
212#endif
213	RETc(eq)			/* Zero length so just exit */
214
215	adds	r1, r1, #0x10		/* Partially adjust for extra sub */
216
217	/* Deal with 16 bytes or more */
218#ifdef _ARM_ARCH_DWORD_OK
219	strdge	r2, r3, [ip], #0x08
220	strdge	r2, r3, [ip], #0x08
221#else
222	stmiage	ip!, {r2-r3}
223	stmiage	ip!, {r2-r3}
224#endif
225#if defined(__minix)
226	moveq   r0, #0
227#endif
228	RETc(eq)			/* Zero length so just exit */
229
230	addlt	r1, r1, #0x10		/* Possibly adjust for extra sub */
231
232	/* We have at least 4 bytes so copy as words */
233.Lmemset_loop4:
234	subs	r1, r1, #0x04
235	strge	r3, [ip], #0x04
236	bgt	.Lmemset_loop4
237#if defined(__minix)
238	moveq	r0, #0
239#endif
240	RETc(eq)			/* Zero length so just exit */
241
242#ifdef _ARM_ARCH_DWORD_OK
243	/* Compensate for 64-bit alignment check */
244	adds	r1, r1, #0x04
245#if defined(__minix)
246	moveq	r0, #0
247#endif
248	RETc(eq)
249	cmp	r1, #2
250#else
251	cmp	r1, #-2
252#endif
253
254	strb	r3, [ip], #0x01		/* Set 1 byte */
255	strbge	r3, [ip], #0x01		/* Set another byte */
256	strbgt	r3, [ip]		/* and a third */
257#if defined(__minix)
258	mov	r0, #0
259#endif
260	RET				/* Exit */
261
262.Lmemset_wordunaligned:
263	rsb	r2, r2, #0x004
264	strb	r3, [ip], #0x01		/* Set 1 byte */
265	cmp	r2, #0x02
266	strbge	r3, [ip], #0x01		/* Set another byte */
267	sub	r1, r1, r2
268	strbgt	r3, [ip], #0x01		/* and a third */
269	cmp	r1, #0x04		/* More than 4 bytes left? */
270	bge	.Lmemset_wordaligned	/* Yup */
271
272.Lmemset_lessthanfour:
273	cmp	r1, #0x00
274#if defined(__minix)
275	moveq	r0, #0
276#endif
277	RETc(eq)				/* Zero length so exit */
278	strb	r3, [ip], #0x01		/* Set 1 byte */
279	cmp	r1, #0x02
280	strbge	r3, [ip], #0x01		/* Set another byte */
281	strbgt	r3, [ip]		/* and a third */
282#if defined(__minix)
283	mov     r0, #0
284#endif
285	RET				/* Exit */
286#ifdef _BZERO
287END(bzero)
288#else
289#if !defined(__minix)
290END(memset)
291#else
292END(phys_memset)
293#endif
294#endif
295
296#if defined(__minix)
297LABEL(memset_fault)		/* kernel can send us here */
298	mov	r0, #0
299	RET
300
301LABEL(memset_fault_in_kernel)	/* kernel can send us here */
302	mrc	p15, 0, r0, c6, c0, 0	/* Read DFAR */
303	RET
304#endif
305