106f32e7eSjoerg //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
206f32e7eSjoerg //
306f32e7eSjoerg // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
406f32e7eSjoerg // See https://llvm.org/LICENSE.txt for license information.
506f32e7eSjoerg // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
606f32e7eSjoerg //
706f32e7eSjoerg //===----------------------------------------------------------------------===//
806f32e7eSjoerg //
906f32e7eSjoerg // This file implements a target parser to recognise hardware features such as
1006f32e7eSjoerg // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
1106f32e7eSjoerg //
1206f32e7eSjoerg //===----------------------------------------------------------------------===//
1306f32e7eSjoerg
1406f32e7eSjoerg #include "llvm/Support/TargetParser.h"
1506f32e7eSjoerg #include "llvm/ADT/ArrayRef.h"
16*da58b97aSjoerg #include "llvm/ADT/SmallString.h"
1706f32e7eSjoerg #include "llvm/ADT/StringSwitch.h"
1806f32e7eSjoerg #include "llvm/ADT/Twine.h"
19*da58b97aSjoerg #include "llvm/Support/ARMBuildAttributes.h"
2006f32e7eSjoerg
2106f32e7eSjoerg using namespace llvm;
2206f32e7eSjoerg using namespace AMDGPU;
2306f32e7eSjoerg
2406f32e7eSjoerg namespace {
2506f32e7eSjoerg
2606f32e7eSjoerg struct GPUInfo {
2706f32e7eSjoerg StringLiteral Name;
2806f32e7eSjoerg StringLiteral CanonicalName;
2906f32e7eSjoerg AMDGPU::GPUKind Kind;
3006f32e7eSjoerg unsigned Features;
3106f32e7eSjoerg };
3206f32e7eSjoerg
33*da58b97aSjoerg constexpr GPUInfo R600GPUs[] = {
3406f32e7eSjoerg // Name Canonical Kind Features
3506f32e7eSjoerg // Name
3606f32e7eSjoerg {{"r600"}, {"r600"}, GK_R600, FEATURE_NONE },
3706f32e7eSjoerg {{"rv630"}, {"r600"}, GK_R600, FEATURE_NONE },
3806f32e7eSjoerg {{"rv635"}, {"r600"}, GK_R600, FEATURE_NONE },
3906f32e7eSjoerg {{"r630"}, {"r630"}, GK_R630, FEATURE_NONE },
4006f32e7eSjoerg {{"rs780"}, {"rs880"}, GK_RS880, FEATURE_NONE },
4106f32e7eSjoerg {{"rs880"}, {"rs880"}, GK_RS880, FEATURE_NONE },
4206f32e7eSjoerg {{"rv610"}, {"rs880"}, GK_RS880, FEATURE_NONE },
4306f32e7eSjoerg {{"rv620"}, {"rs880"}, GK_RS880, FEATURE_NONE },
4406f32e7eSjoerg {{"rv670"}, {"rv670"}, GK_RV670, FEATURE_NONE },
4506f32e7eSjoerg {{"rv710"}, {"rv710"}, GK_RV710, FEATURE_NONE },
4606f32e7eSjoerg {{"rv730"}, {"rv730"}, GK_RV730, FEATURE_NONE },
4706f32e7eSjoerg {{"rv740"}, {"rv770"}, GK_RV770, FEATURE_NONE },
4806f32e7eSjoerg {{"rv770"}, {"rv770"}, GK_RV770, FEATURE_NONE },
4906f32e7eSjoerg {{"cedar"}, {"cedar"}, GK_CEDAR, FEATURE_NONE },
5006f32e7eSjoerg {{"palm"}, {"cedar"}, GK_CEDAR, FEATURE_NONE },
5106f32e7eSjoerg {{"cypress"}, {"cypress"}, GK_CYPRESS, FEATURE_FMA },
5206f32e7eSjoerg {{"hemlock"}, {"cypress"}, GK_CYPRESS, FEATURE_FMA },
5306f32e7eSjoerg {{"juniper"}, {"juniper"}, GK_JUNIPER, FEATURE_NONE },
5406f32e7eSjoerg {{"redwood"}, {"redwood"}, GK_REDWOOD, FEATURE_NONE },
5506f32e7eSjoerg {{"sumo"}, {"sumo"}, GK_SUMO, FEATURE_NONE },
5606f32e7eSjoerg {{"sumo2"}, {"sumo"}, GK_SUMO, FEATURE_NONE },
5706f32e7eSjoerg {{"barts"}, {"barts"}, GK_BARTS, FEATURE_NONE },
5806f32e7eSjoerg {{"caicos"}, {"caicos"}, GK_CAICOS, FEATURE_NONE },
5906f32e7eSjoerg {{"aruba"}, {"cayman"}, GK_CAYMAN, FEATURE_FMA },
6006f32e7eSjoerg {{"cayman"}, {"cayman"}, GK_CAYMAN, FEATURE_FMA },
6106f32e7eSjoerg {{"turks"}, {"turks"}, GK_TURKS, FEATURE_NONE }
6206f32e7eSjoerg };
6306f32e7eSjoerg
6406f32e7eSjoerg // This table should be sorted by the value of GPUKind
6506f32e7eSjoerg // Don't bother listing the implicitly true features
66*da58b97aSjoerg constexpr GPUInfo AMDGCNGPUs[] = {
6706f32e7eSjoerg // Name Canonical Kind Features
6806f32e7eSjoerg // Name
6906f32e7eSjoerg {{"gfx600"}, {"gfx600"}, GK_GFX600, FEATURE_FAST_FMA_F32},
7006f32e7eSjoerg {{"tahiti"}, {"gfx600"}, GK_GFX600, FEATURE_FAST_FMA_F32},
7106f32e7eSjoerg {{"gfx601"}, {"gfx601"}, GK_GFX601, FEATURE_NONE},
7206f32e7eSjoerg {{"pitcairn"}, {"gfx601"}, GK_GFX601, FEATURE_NONE},
7306f32e7eSjoerg {{"verde"}, {"gfx601"}, GK_GFX601, FEATURE_NONE},
74*da58b97aSjoerg {{"gfx602"}, {"gfx602"}, GK_GFX602, FEATURE_NONE},
75*da58b97aSjoerg {{"hainan"}, {"gfx602"}, GK_GFX602, FEATURE_NONE},
76*da58b97aSjoerg {{"oland"}, {"gfx602"}, GK_GFX602, FEATURE_NONE},
7706f32e7eSjoerg {{"gfx700"}, {"gfx700"}, GK_GFX700, FEATURE_NONE},
7806f32e7eSjoerg {{"kaveri"}, {"gfx700"}, GK_GFX700, FEATURE_NONE},
7906f32e7eSjoerg {{"gfx701"}, {"gfx701"}, GK_GFX701, FEATURE_FAST_FMA_F32},
8006f32e7eSjoerg {{"hawaii"}, {"gfx701"}, GK_GFX701, FEATURE_FAST_FMA_F32},
8106f32e7eSjoerg {{"gfx702"}, {"gfx702"}, GK_GFX702, FEATURE_FAST_FMA_F32},
8206f32e7eSjoerg {{"gfx703"}, {"gfx703"}, GK_GFX703, FEATURE_NONE},
8306f32e7eSjoerg {{"kabini"}, {"gfx703"}, GK_GFX703, FEATURE_NONE},
8406f32e7eSjoerg {{"mullins"}, {"gfx703"}, GK_GFX703, FEATURE_NONE},
8506f32e7eSjoerg {{"gfx704"}, {"gfx704"}, GK_GFX704, FEATURE_NONE},
8606f32e7eSjoerg {{"bonaire"}, {"gfx704"}, GK_GFX704, FEATURE_NONE},
87*da58b97aSjoerg {{"gfx705"}, {"gfx705"}, GK_GFX705, FEATURE_NONE},
88*da58b97aSjoerg {{"gfx801"}, {"gfx801"}, GK_GFX801, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
89*da58b97aSjoerg {{"carrizo"}, {"gfx801"}, GK_GFX801, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
9006f32e7eSjoerg {{"gfx802"}, {"gfx802"}, GK_GFX802, FEATURE_FAST_DENORMAL_F32},
9106f32e7eSjoerg {{"iceland"}, {"gfx802"}, GK_GFX802, FEATURE_FAST_DENORMAL_F32},
9206f32e7eSjoerg {{"tonga"}, {"gfx802"}, GK_GFX802, FEATURE_FAST_DENORMAL_F32},
9306f32e7eSjoerg {{"gfx803"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32},
9406f32e7eSjoerg {{"fiji"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32},
9506f32e7eSjoerg {{"polaris10"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32},
9606f32e7eSjoerg {{"polaris11"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32},
97*da58b97aSjoerg {{"gfx805"}, {"gfx805"}, GK_GFX805, FEATURE_FAST_DENORMAL_F32},
98*da58b97aSjoerg {{"tongapro"}, {"gfx805"}, GK_GFX805, FEATURE_FAST_DENORMAL_F32},
99*da58b97aSjoerg {{"gfx810"}, {"gfx810"}, GK_GFX810, FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
100*da58b97aSjoerg {{"stoney"}, {"gfx810"}, GK_GFX810, FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
101*da58b97aSjoerg {{"gfx900"}, {"gfx900"}, GK_GFX900, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
102*da58b97aSjoerg {{"gfx902"}, {"gfx902"}, GK_GFX902, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
103*da58b97aSjoerg {{"gfx904"}, {"gfx904"}, GK_GFX904, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
104*da58b97aSjoerg {{"gfx906"}, {"gfx906"}, GK_GFX906, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC},
105*da58b97aSjoerg {{"gfx908"}, {"gfx908"}, GK_GFX908, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC},
106*da58b97aSjoerg {{"gfx909"}, {"gfx909"}, GK_GFX909, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
107*da58b97aSjoerg {{"gfx90a"}, {"gfx90a"}, GK_GFX90A, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC},
108*da58b97aSjoerg {{"gfx90c"}, {"gfx90c"}, GK_GFX90C, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK},
109*da58b97aSjoerg {{"gfx1010"}, {"gfx1010"}, GK_GFX1010, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
110*da58b97aSjoerg {{"gfx1011"}, {"gfx1011"}, GK_GFX1011, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
111*da58b97aSjoerg {{"gfx1012"}, {"gfx1012"}, GK_GFX1012, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK},
112*da58b97aSjoerg {{"gfx1030"}, {"gfx1030"}, GK_GFX1030, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
113*da58b97aSjoerg {{"gfx1031"}, {"gfx1031"}, GK_GFX1031, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
114*da58b97aSjoerg {{"gfx1032"}, {"gfx1032"}, GK_GFX1032, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
115*da58b97aSjoerg {{"gfx1033"}, {"gfx1033"}, GK_GFX1033, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
116*da58b97aSjoerg {{"gfx1034"}, {"gfx1034"}, GK_GFX1034, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32},
11706f32e7eSjoerg };
11806f32e7eSjoerg
getArchEntry(AMDGPU::GPUKind AK,ArrayRef<GPUInfo> Table)11906f32e7eSjoerg const GPUInfo *getArchEntry(AMDGPU::GPUKind AK, ArrayRef<GPUInfo> Table) {
12006f32e7eSjoerg GPUInfo Search = { {""}, {""}, AK, AMDGPU::FEATURE_NONE };
12106f32e7eSjoerg
122*da58b97aSjoerg auto I =
123*da58b97aSjoerg llvm::lower_bound(Table, Search, [](const GPUInfo &A, const GPUInfo &B) {
12406f32e7eSjoerg return A.Kind < B.Kind;
12506f32e7eSjoerg });
12606f32e7eSjoerg
12706f32e7eSjoerg if (I == Table.end())
12806f32e7eSjoerg return nullptr;
12906f32e7eSjoerg return I;
13006f32e7eSjoerg }
13106f32e7eSjoerg
13206f32e7eSjoerg } // namespace
13306f32e7eSjoerg
getArchNameAMDGCN(GPUKind AK)13406f32e7eSjoerg StringRef llvm::AMDGPU::getArchNameAMDGCN(GPUKind AK) {
13506f32e7eSjoerg if (const auto *Entry = getArchEntry(AK, AMDGCNGPUs))
13606f32e7eSjoerg return Entry->CanonicalName;
13706f32e7eSjoerg return "";
13806f32e7eSjoerg }
13906f32e7eSjoerg
getArchNameR600(GPUKind AK)14006f32e7eSjoerg StringRef llvm::AMDGPU::getArchNameR600(GPUKind AK) {
14106f32e7eSjoerg if (const auto *Entry = getArchEntry(AK, R600GPUs))
14206f32e7eSjoerg return Entry->CanonicalName;
14306f32e7eSjoerg return "";
14406f32e7eSjoerg }
14506f32e7eSjoerg
parseArchAMDGCN(StringRef CPU)14606f32e7eSjoerg AMDGPU::GPUKind llvm::AMDGPU::parseArchAMDGCN(StringRef CPU) {
147*da58b97aSjoerg for (const auto &C : AMDGCNGPUs) {
14806f32e7eSjoerg if (CPU == C.Name)
14906f32e7eSjoerg return C.Kind;
15006f32e7eSjoerg }
15106f32e7eSjoerg
15206f32e7eSjoerg return AMDGPU::GPUKind::GK_NONE;
15306f32e7eSjoerg }
15406f32e7eSjoerg
parseArchR600(StringRef CPU)15506f32e7eSjoerg AMDGPU::GPUKind llvm::AMDGPU::parseArchR600(StringRef CPU) {
156*da58b97aSjoerg for (const auto &C : R600GPUs) {
15706f32e7eSjoerg if (CPU == C.Name)
15806f32e7eSjoerg return C.Kind;
15906f32e7eSjoerg }
16006f32e7eSjoerg
16106f32e7eSjoerg return AMDGPU::GPUKind::GK_NONE;
16206f32e7eSjoerg }
16306f32e7eSjoerg
getArchAttrAMDGCN(GPUKind AK)16406f32e7eSjoerg unsigned AMDGPU::getArchAttrAMDGCN(GPUKind AK) {
16506f32e7eSjoerg if (const auto *Entry = getArchEntry(AK, AMDGCNGPUs))
16606f32e7eSjoerg return Entry->Features;
16706f32e7eSjoerg return FEATURE_NONE;
16806f32e7eSjoerg }
16906f32e7eSjoerg
getArchAttrR600(GPUKind AK)17006f32e7eSjoerg unsigned AMDGPU::getArchAttrR600(GPUKind AK) {
17106f32e7eSjoerg if (const auto *Entry = getArchEntry(AK, R600GPUs))
17206f32e7eSjoerg return Entry->Features;
17306f32e7eSjoerg return FEATURE_NONE;
17406f32e7eSjoerg }
17506f32e7eSjoerg
fillValidArchListAMDGCN(SmallVectorImpl<StringRef> & Values)17606f32e7eSjoerg void AMDGPU::fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values) {
17706f32e7eSjoerg // XXX: Should this only report unique canonical names?
178*da58b97aSjoerg for (const auto &C : AMDGCNGPUs)
17906f32e7eSjoerg Values.push_back(C.Name);
18006f32e7eSjoerg }
18106f32e7eSjoerg
fillValidArchListR600(SmallVectorImpl<StringRef> & Values)18206f32e7eSjoerg void AMDGPU::fillValidArchListR600(SmallVectorImpl<StringRef> &Values) {
183*da58b97aSjoerg for (const auto &C : R600GPUs)
18406f32e7eSjoerg Values.push_back(C.Name);
18506f32e7eSjoerg }
18606f32e7eSjoerg
getIsaVersion(StringRef GPU)18706f32e7eSjoerg AMDGPU::IsaVersion AMDGPU::getIsaVersion(StringRef GPU) {
18806f32e7eSjoerg AMDGPU::GPUKind AK = parseArchAMDGCN(GPU);
18906f32e7eSjoerg if (AK == AMDGPU::GPUKind::GK_NONE) {
19006f32e7eSjoerg if (GPU == "generic-hsa")
19106f32e7eSjoerg return {7, 0, 0};
19206f32e7eSjoerg if (GPU == "generic")
19306f32e7eSjoerg return {6, 0, 0};
19406f32e7eSjoerg return {0, 0, 0};
19506f32e7eSjoerg }
19606f32e7eSjoerg
19706f32e7eSjoerg switch (AK) {
19806f32e7eSjoerg case GK_GFX600: return {6, 0, 0};
19906f32e7eSjoerg case GK_GFX601: return {6, 0, 1};
200*da58b97aSjoerg case GK_GFX602: return {6, 0, 2};
20106f32e7eSjoerg case GK_GFX700: return {7, 0, 0};
20206f32e7eSjoerg case GK_GFX701: return {7, 0, 1};
20306f32e7eSjoerg case GK_GFX702: return {7, 0, 2};
20406f32e7eSjoerg case GK_GFX703: return {7, 0, 3};
20506f32e7eSjoerg case GK_GFX704: return {7, 0, 4};
206*da58b97aSjoerg case GK_GFX705: return {7, 0, 5};
20706f32e7eSjoerg case GK_GFX801: return {8, 0, 1};
20806f32e7eSjoerg case GK_GFX802: return {8, 0, 2};
20906f32e7eSjoerg case GK_GFX803: return {8, 0, 3};
210*da58b97aSjoerg case GK_GFX805: return {8, 0, 5};
21106f32e7eSjoerg case GK_GFX810: return {8, 1, 0};
21206f32e7eSjoerg case GK_GFX900: return {9, 0, 0};
21306f32e7eSjoerg case GK_GFX902: return {9, 0, 2};
21406f32e7eSjoerg case GK_GFX904: return {9, 0, 4};
21506f32e7eSjoerg case GK_GFX906: return {9, 0, 6};
21606f32e7eSjoerg case GK_GFX908: return {9, 0, 8};
21706f32e7eSjoerg case GK_GFX909: return {9, 0, 9};
218*da58b97aSjoerg case GK_GFX90A: return {9, 0, 10};
219*da58b97aSjoerg case GK_GFX90C: return {9, 0, 12};
22006f32e7eSjoerg case GK_GFX1010: return {10, 1, 0};
22106f32e7eSjoerg case GK_GFX1011: return {10, 1, 1};
22206f32e7eSjoerg case GK_GFX1012: return {10, 1, 2};
223*da58b97aSjoerg case GK_GFX1030: return {10, 3, 0};
224*da58b97aSjoerg case GK_GFX1031: return {10, 3, 1};
225*da58b97aSjoerg case GK_GFX1032: return {10, 3, 2};
226*da58b97aSjoerg case GK_GFX1033: return {10, 3, 3};
227*da58b97aSjoerg case GK_GFX1034: return {10, 3, 4};
22806f32e7eSjoerg default: return {0, 0, 0};
22906f32e7eSjoerg }
23006f32e7eSjoerg }
231*da58b97aSjoerg
getCanonicalArchName(const Triple & T,StringRef Arch)232*da58b97aSjoerg StringRef AMDGPU::getCanonicalArchName(const Triple &T, StringRef Arch) {
233*da58b97aSjoerg assert(T.isAMDGPU());
234*da58b97aSjoerg auto ProcKind = T.isAMDGCN() ? parseArchAMDGCN(Arch) : parseArchR600(Arch);
235*da58b97aSjoerg if (ProcKind == GK_NONE)
236*da58b97aSjoerg return StringRef();
237*da58b97aSjoerg
238*da58b97aSjoerg return T.isAMDGCN() ? getArchNameAMDGCN(ProcKind) : getArchNameR600(ProcKind);
239*da58b97aSjoerg }
240*da58b97aSjoerg
241*da58b97aSjoerg namespace llvm {
242*da58b97aSjoerg namespace RISCV {
243*da58b97aSjoerg
244*da58b97aSjoerg struct CPUInfo {
245*da58b97aSjoerg StringLiteral Name;
246*da58b97aSjoerg CPUKind Kind;
247*da58b97aSjoerg unsigned Features;
248*da58b97aSjoerg StringLiteral DefaultMarch;
is64Bitllvm::RISCV::CPUInfo249*da58b97aSjoerg bool is64Bit() const { return (Features & FK_64BIT); }
250*da58b97aSjoerg };
251*da58b97aSjoerg
252*da58b97aSjoerg constexpr CPUInfo RISCVCPUInfo[] = {
253*da58b97aSjoerg #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) \
254*da58b97aSjoerg {NAME, CK_##ENUM, FEATURES, DEFAULT_MARCH},
255*da58b97aSjoerg #include "llvm/Support/RISCVTargetParser.def"
256*da58b97aSjoerg };
257*da58b97aSjoerg
checkCPUKind(CPUKind Kind,bool IsRV64)258*da58b97aSjoerg bool checkCPUKind(CPUKind Kind, bool IsRV64) {
259*da58b97aSjoerg if (Kind == CK_INVALID)
260*da58b97aSjoerg return false;
261*da58b97aSjoerg return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64;
262*da58b97aSjoerg }
263*da58b97aSjoerg
checkTuneCPUKind(CPUKind Kind,bool IsRV64)264*da58b97aSjoerg bool checkTuneCPUKind(CPUKind Kind, bool IsRV64) {
265*da58b97aSjoerg if (Kind == CK_INVALID)
266*da58b97aSjoerg return false;
267*da58b97aSjoerg return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64;
268*da58b97aSjoerg }
269*da58b97aSjoerg
parseCPUKind(StringRef CPU)270*da58b97aSjoerg CPUKind parseCPUKind(StringRef CPU) {
271*da58b97aSjoerg return llvm::StringSwitch<CPUKind>(CPU)
272*da58b97aSjoerg #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) .Case(NAME, CK_##ENUM)
273*da58b97aSjoerg #include "llvm/Support/RISCVTargetParser.def"
274*da58b97aSjoerg .Default(CK_INVALID);
275*da58b97aSjoerg }
276*da58b97aSjoerg
resolveTuneCPUAlias(StringRef TuneCPU,bool IsRV64)277*da58b97aSjoerg StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64) {
278*da58b97aSjoerg return llvm::StringSwitch<StringRef>(TuneCPU)
279*da58b97aSjoerg #define PROC_ALIAS(NAME, RV32, RV64) .Case(NAME, IsRV64 ? StringRef(RV64) : StringRef(RV32))
280*da58b97aSjoerg #include "llvm/Support/RISCVTargetParser.def"
281*da58b97aSjoerg .Default(TuneCPU);
282*da58b97aSjoerg }
283*da58b97aSjoerg
parseTuneCPUKind(StringRef TuneCPU,bool IsRV64)284*da58b97aSjoerg CPUKind parseTuneCPUKind(StringRef TuneCPU, bool IsRV64) {
285*da58b97aSjoerg TuneCPU = resolveTuneCPUAlias(TuneCPU, IsRV64);
286*da58b97aSjoerg
287*da58b97aSjoerg return llvm::StringSwitch<CPUKind>(TuneCPU)
288*da58b97aSjoerg #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) .Case(NAME, CK_##ENUM)
289*da58b97aSjoerg #include "llvm/Support/RISCVTargetParser.def"
290*da58b97aSjoerg .Default(CK_INVALID);
291*da58b97aSjoerg }
292*da58b97aSjoerg
getMArchFromMcpu(StringRef CPU)293*da58b97aSjoerg StringRef getMArchFromMcpu(StringRef CPU) {
294*da58b97aSjoerg CPUKind Kind = parseCPUKind(CPU);
295*da58b97aSjoerg return RISCVCPUInfo[static_cast<unsigned>(Kind)].DefaultMarch;
296*da58b97aSjoerg }
297*da58b97aSjoerg
fillValidCPUArchList(SmallVectorImpl<StringRef> & Values,bool IsRV64)298*da58b97aSjoerg void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) {
299*da58b97aSjoerg for (const auto &C : RISCVCPUInfo) {
300*da58b97aSjoerg if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit())
301*da58b97aSjoerg Values.emplace_back(C.Name);
302*da58b97aSjoerg }
303*da58b97aSjoerg }
304*da58b97aSjoerg
fillValidTuneCPUArchList(SmallVectorImpl<StringRef> & Values,bool IsRV64)305*da58b97aSjoerg void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) {
306*da58b97aSjoerg for (const auto &C : RISCVCPUInfo) {
307*da58b97aSjoerg if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit())
308*da58b97aSjoerg Values.emplace_back(C.Name);
309*da58b97aSjoerg }
310*da58b97aSjoerg #define PROC_ALIAS(NAME, RV32, RV64) Values.emplace_back(StringRef(NAME));
311*da58b97aSjoerg #include "llvm/Support/RISCVTargetParser.def"
312*da58b97aSjoerg }
313*da58b97aSjoerg
314*da58b97aSjoerg // Get all features except standard extension feature
getCPUFeaturesExceptStdExt(CPUKind Kind,std::vector<StringRef> & Features)315*da58b97aSjoerg bool getCPUFeaturesExceptStdExt(CPUKind Kind,
316*da58b97aSjoerg std::vector<StringRef> &Features) {
317*da58b97aSjoerg unsigned CPUFeatures = RISCVCPUInfo[static_cast<unsigned>(Kind)].Features;
318*da58b97aSjoerg
319*da58b97aSjoerg if (CPUFeatures == FK_INVALID)
320*da58b97aSjoerg return false;
321*da58b97aSjoerg
322*da58b97aSjoerg if (CPUFeatures & FK_64BIT)
323*da58b97aSjoerg Features.push_back("+64bit");
324*da58b97aSjoerg else
325*da58b97aSjoerg Features.push_back("-64bit");
326*da58b97aSjoerg
327*da58b97aSjoerg return true;
328*da58b97aSjoerg }
329*da58b97aSjoerg
330*da58b97aSjoerg } // namespace RISCV
331*da58b97aSjoerg } // namespace llvm
332