1; Lattice Mico32 CPU description. -*- Scheme -*- 2; Copyright 2008, 2009 Free Software Foundation, Inc. 3; Contributed by Jon Beniston <jon@beniston.com> 4; 5; This file is part of the GNU Binutils. 6; 7; This program is free software; you can redistribute it and/or modify 8; it under the terms of the GNU General Public License as published by 9; the Free Software Foundation; either version 3 of the License, or 10; (at your option) any later version. 11; 12; This program is distributed in the hope that it will be useful, 13; but WITHOUT ANY WARRANTY; without even the implied warranty of 14; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15; GNU General Public License for more details. 16; 17; You should have received a copy of the GNU General Public License 18; along with this program; if not, write to the Free Software 19; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 20; MA 02110-1301, USA. 21 22(include "simplify.inc") 23 24(define-arch 25 (name lm32) ; name of cpu family 26 (comment "Lattice Mico32") 27 (default-alignment aligned) 28 (insn-lsb0? #t) 29 (machs lm32) 30 (isas lm32) 31) 32 33 34; Instruction sets. 35 36(define-isa 37 (name lm32) 38 (comment "Lattice Mico32 ISA") 39 (default-insn-word-bitsize 32) 40 (default-insn-bitsize 32) 41 (base-insn-bitsize 32) 42 (decode-assist (31 30 29 28 27 26)) 43) 44 45 46; Cpu family definitions. 47 48(define-cpu 49 ; cpu names must be distinct from the architecture name and machine name 50 (name lm32bf) 51 (comment "Lattice Mico32 CPU") 52 (endian big) 53 (word-bitsize 32) 54) 55 56(define-mach 57 (name lm32) 58 (comment "Lattice Mico32 MACH") 59 (cpu lm32bf) 60) 61 62(define-model 63 (name lm32) 64 (comment "Lattice Mico32 reference implementation") 65 (mach lm32) 66 (unit u-exec "Execution unit" () 67 1 1 () () () ()) 68) 69 70 71; Hardware elements. 72 73(dnh h-pc "Program counter" (PC) (pc) () () ()) 74 75(dnh h-gr "General purpose registers" 76 () 77 (register SI (32)) 78 (keyword "" ( 79 (gp 26) (fp 27) (sp 28) (ra 29) (ea 30) (ba 31) 80 (r0 0) (r1 1) (r2 2) (r3 3) 81 (r4 4) (r5 5) (r6 6) (r7 7) 82 (r8 8) (r9 9) (r10 10) (r11 11) 83 (r12 12) (r13 13) (r14 14) (r15 15) 84 (r16 16) (r17 17) (r18 18) (r19 19) 85 (r20 20) (r21 21) (r22 22) (r23 23) 86 (r24 24) (r25 25) (r26 26) (r27 27) 87 (r28 28) (r29 29) (r30 30) (r31 31) 88 ) 89 ) 90 () () 91) 92 93(dnh h-csr "Control and status registers" 94 () 95 (register SI (32)) 96 (keyword "" ( 97 (IE 0) (IM 1) (IP 2) 98 (ICC 3) (DCC 4) 99 (CC 5) 100 (CFG 6) 101 (EBA 7) 102 (DC 8) 103 (DEBA 9) 104 (JTX 14) (JRX 15) 105 (BP0 16) (BP1 17) (BP2 18) (BP3 19) 106 (WP0 24) (WP1 25) (WP2 26) (WP3 27) 107 ) 108 ) 109 () () 110) 111 112 113; Instruction fields. 114 115(dnf f-opcode "opcode field" () 31 6) 116(dnf f-r0 "register index 0 field" () 25 5) 117(dnf f-r1 "register index 1 field" () 20 5) 118(dnf f-r2 "register index 2 field" () 15 5) 119(dnf f-resv0 "reserved" (RESERVED) 10 11) 120(dnf f-shift "shift amount field" () 4 5) 121(df f-imm "signed immediate field" () 15 16 INT #f #f) 122(dnf f-uimm "unsigned immediate field" () 15 16) 123(dnf f-csr "csr field" () 25 5) 124(dnf f-user "user defined field" () 10 11) 125(dnf f-exception "exception field" () 25 26) 126 127(df f-branch "branch offset field" (PCREL-ADDR) 15 16 INT 128 ((value pc) (sra SI (sub SI value pc) 2)) 129 ((value pc) (add SI pc (sra SI (sll SI value 16) 14))) 130) 131(df f-call "call offset field" (PCREL-ADDR) 25 26 INT 132 ((value pc) (sra SI (sub SI value pc) 2)) 133 ((value pc) (add SI pc (sra SI (sll SI value 6) 4))) 134) 135 136 137; Operands. 138 139(dnop r0 "register 0" () h-gr f-r0) 140(dnop r1 "register 1" () h-gr f-r1) 141(dnop r2 "register 2" () h-gr f-r2) 142(dnop shift "shift amout" () h-uint f-shift) 143(dnop imm "signed immediate" () h-sint f-imm) 144(dnop uimm "unsigned immediate" () h-uint f-uimm) 145(dnop branch "branch offset" () h-iaddr f-branch) 146(dnop call "call offset" () h-iaddr f-call) 147(dnop csr "csr" () h-csr f-csr) 148(dnop user "user" () h-uint f-user) 149(dnop exception "exception" () h-uint f-exception) 150 151(define-operand 152 (name hi16) 153 (comment "high 16-bit immediate") 154 (attrs) 155 (type h-uint) 156 (index f-uimm) 157 (handlers (parse "hi16")) 158) 159 160(define-operand 161 (name lo16) 162 (comment "low 16-bit immediate") 163 (attrs) 164 (type h-uint) 165 (index f-uimm) 166 (handlers (parse "lo16")) 167) 168 169(define-operand 170 (name gp16) 171 (comment "gp relative 16-bit immediate") 172 (attrs) 173 (type h-sint) 174 (index f-imm) 175 (handlers (parse "gp16")) 176) 177 178(define-operand 179 (name got16) 180 (comment "got 16-bit immediate") 181 (attrs) 182 (type h-sint) 183 (index f-imm) 184 (handlers (parse "got16")) 185) 186 187(define-operand 188 (name gotoffhi16) 189 (comment "got offset high 16-bit immediate") 190 (attrs) 191 (type h-sint) 192 (index f-imm) 193 (handlers (parse "gotoff_hi16")) 194) 195 196(define-operand 197 (name gotofflo16) 198 (comment "got offset low 16-bit immediate") 199 (attrs) 200 (type h-sint) 201 (index f-imm) 202 (handlers (parse "gotoff_lo16")) 203) 204 205 206; Enumerations. 207 208(define-normal-insn-enum 209 opcodes "opcodes" () OP_ f-opcode 210 (("ADD" 45) 211 ("ADDI" 13) 212 ("AND" 40) 213 ("ANDI" 8) 214 ("ANDHI" 24) 215 ("B" 48) 216 ("BI" 56) 217 ("BE" 17) 218 ("BG" 18) 219 ("BGE" 19) 220 ("BGEU" 20) 221 ("BGU" 21) 222 ("BNE" 23) 223 ("CALL" 54) 224 ("CALLI" 62) 225 ("CMPE" 57) 226 ("CMPEI" 25) 227 ("CMPG" 58) 228 ("CMPGI" 26) 229 ("CMPGE" 59) 230 ("CMPGEI" 27) 231 ("CMPGEU" 60) 232 ("CMPGEUI" 28) 233 ("CMPGU" 61) 234 ("CMPGUI" 29) 235 ("CMPNE" 63) 236 ("CMPNEI" 31) 237 ("DIVU" 35) 238 ("LB" 4) 239 ("LBU" 16) 240 ("LH" 7) 241 ("LHU" 11) 242 ("LW" 10) 243 ("MODU" 49) 244 ("MUL" 34) 245 ("MULI" 2) 246 ("NOR" 33) 247 ("NORI" 1) 248 ("OR" 46) 249 ("ORI" 14) 250 ("ORHI" 30) 251 ("RAISE" 43) 252 ("RCSR" 36) 253 ("SB" 12) 254 ("SEXTB" 44) 255 ("SEXTH" 55) 256 ("SH" 3) 257 ("SL" 47) 258 ("SLI" 15) 259 ("SR" 37) 260 ("SRI" 5) 261 ("SRU" 32) 262 ("SRUI" 0) 263 ("SUB" 50) 264 ("SW" 22) 265 ("USER" 51) 266 ("WCSR" 52) 267 ("XNOR" 41) 268 ("XNORI" 9) 269 ("XOR" 38) 270 ("XORI" 6) 271 ) 272) 273 274 275; Instructions. Note: Reg-reg must come before reg-imm. 276 277(dni add "add" () 278 "add $r2,$r0,$r1" 279 (+ OP_ADD r0 r1 r2 (f-resv0 0)) 280 (set r2 (add r0 r1)) 281 () 282) 283 284(dni addi "add immediate" () 285 "addi $r1,$r0,$imm" 286 (+ OP_ADDI r0 r1 imm) 287 (set r1 (add r0 (ext SI (trunc HI imm)))) 288 () 289) 290 291(dni and "and" () 292 "and $r2,$r0,$r1" 293 (+ OP_AND r0 r1 r2 (f-resv0 0)) 294 (set r2 (and r0 r1)) 295 () 296) 297 298(dni andi "and immediate" () 299 "andi $r1,$r0,$uimm" 300 (+ OP_ANDI r0 r1 uimm) 301 (set r1 (and r0 (zext SI uimm))) 302 () 303) 304 305(dni andhii "and high immediate" () 306 "andhi $r1,$r0,$hi16" 307 (+ OP_ANDHI r0 r1 hi16) 308 (set r1 (and r0 (sll SI hi16 16))) 309 () 310) 311 312(dni b "branch" () 313 "b $r0" 314 (+ OP_B r0 (f-r1 0) (f-r2 0) (f-resv0 0)) 315 (set pc (c-call USI "@cpu@_b_insn" r0 f-r0)) 316 () 317) 318 319(dni bi "branch immediate" () 320 "bi $call" 321 (+ OP_BI call) 322 (set pc (ext SI call)) 323 () 324) 325 326(dni be "branch equal" () 327 "be $r0,$r1,$branch" 328 (+ OP_BE r0 r1 branch) 329 (if (eq r0 r1) 330 (set pc branch) 331 ) 332 () 333) 334 335(dni bg "branch greater" () 336 "bg $r0,$r1,$branch" 337 (+ OP_BG r0 r1 branch) 338 (if (gt r0 r1) 339 (set pc branch) 340 ) 341 () 342) 343 344(dni bge "branch greater or equal" () 345 "bge $r0,$r1,$branch" 346 (+ OP_BGE r0 r1 branch) 347 (if (ge r0 r1) 348 (set pc branch) 349 ) 350 () 351) 352 353(dni bgeu "branch greater or equal unsigned" () 354 "bgeu $r0,$r1,$branch" 355 (+ OP_BGEU r0 r1 branch) 356 (if (geu r0 r1) 357 (set pc branch) 358 ) 359 () 360) 361 362(dni bgu "branch greater unsigned" () 363 "bgu $r0,$r1,$branch" 364 (+ OP_BGU r0 r1 branch) 365 (if (gtu r0 r1) 366 (set pc branch) 367 ) 368 () 369) 370 371(dni bne "branch not equal" () 372 "bne $r0,$r1,$branch" 373 (+ OP_BNE r0 r1 branch) 374 (if (ne r0 r1) 375 (set pc branch) 376 ) 377 () 378) 379 380(dni call "call" () 381 "call $r0" 382 (+ OP_CALL r0 (f-r1 0) (f-r2 0) (f-resv0 0)) 383 (sequence () 384 (set (reg h-gr 29) (add pc 4)) 385 (set pc r0) 386 ) 387 () 388) 389 390(dni calli "call immediate" () 391 "calli $call" 392 (+ OP_CALLI call) 393 (sequence () 394 (set (reg h-gr 29) (add pc 4)) 395 (set pc (ext SI call)) 396 ) 397 () 398) 399 400(dni cmpe "compare equal" () 401 "cmpe $r2,$r0,$r1" 402 (+ OP_CMPE r0 r1 r2 (f-resv0 0)) 403 (set r2 (eq SI r0 r1)) 404 () 405) 406 407(dni cmpei "compare equal immediate" () 408 "cmpei $r1,$r0,$imm" 409 (+ OP_CMPEI r0 r1 imm) 410 (set r1 (eq SI r0 (ext SI (trunc HI imm)))) 411 () 412) 413 414(dni cmpg "compare greater than" () 415 "cmpg $r2,$r0,$r1" 416 (+ OP_CMPG r0 r1 r2 (f-resv0 0)) 417 (set r2 (gt SI r0 r1)) 418 () 419) 420 421(dni cmpgi "compare greater than immediate" () 422 "cmpgi $r1,$r0,$imm" 423 (+ OP_CMPGI r0 r1 imm) 424 (set r1 (gt SI r0 (ext SI (trunc HI imm)))) 425 () 426) 427 428(dni cmpge "compare greater or equal" () 429 "cmpge $r2,$r0,$r1" 430 (+ OP_CMPGE r0 r1 r2 (f-resv0 0)) 431 (set r2 (ge SI r0 r1)) 432 () 433) 434 435(dni cmpgei "compare greater or equal immediate" () 436 "cmpgei $r1,$r0,$imm" 437 (+ OP_CMPGEI r0 r1 imm) 438 (set r1 (ge SI r0 (ext SI (trunc HI imm)))) 439 () 440) 441 442(dni cmpgeu "compare greater or equal unsigned" () 443 "cmpgeu $r2,$r0,$r1" 444 (+ OP_CMPGEU r0 r1 r2 (f-resv0 0)) 445 (set r2 (geu SI r0 r1)) 446 () 447) 448 449(dni cmpgeui "compare greater or equal unsigned immediate" () 450 "cmpgeui $r1,$r0,$uimm" 451 (+ OP_CMPGEUI r0 r1 uimm) 452 (set r1 (geu SI r0 (zext SI uimm))) 453 () 454) 455 456(dni cmpgu "compare greater than unsigned" () 457 "cmpgu $r2,$r0,$r1" 458 (+ OP_CMPGU r0 r1 r2 (f-resv0 0)) 459 (set r2 (gtu SI r0 r1)) 460 () 461) 462 463(dni cmpgui "compare greater than unsigned immediate" () 464 "cmpgui $r1,$r0,$uimm" 465 (+ OP_CMPGUI r0 r1 uimm) 466 (set r1 (gtu SI r0 (zext SI uimm))) 467 () 468) 469 470(dni cmpne "compare not equal" () 471 "cmpne $r2,$r0,$r1" 472 (+ OP_CMPNE r0 r1 r2 (f-resv0 0)) 473 (set r2 (ne SI r0 r1)) 474 () 475) 476 477(dni cmpnei "compare not equal immediate" () 478 "cmpnei $r1,$r0,$imm" 479 (+ OP_CMPNEI r0 r1 imm) 480 (set r1 (ne SI r0 (ext SI (trunc HI imm)))) 481 () 482) 483 484(dni divu "unsigned divide" () 485 "divu $r2,$r0,$r1" 486 (+ OP_DIVU r0 r1 r2 (f-resv0 0)) 487 (set pc (c-call USI "@cpu@_divu_insn" pc f-r0 f-r1 f-r2)) 488 () 489) 490 491(dni lb "load byte" () 492 "lb $r1,($r0+$imm)" 493 (+ OP_LB r0 r1 imm) 494 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI imm)))))) 495 () 496) 497 498(dni lbu "load byte unsigned" () 499 "lbu $r1,($r0+$imm)" 500 (+ OP_LBU r0 r1 imm) 501 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI imm)))))) 502 () 503) 504 505(dni lh "load halfword" () 506 "lh $r1,($r0+$imm)" 507 (+ OP_LH r0 r1 imm) 508 (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI imm)))))) 509 () 510) 511 512(dni lhu "load halfword unsigned" () 513 "lhu $r1,($r0+$imm)" 514 (+ OP_LHU r0 r1 imm) 515 (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI imm)))))) 516 () 517) 518 519(dni lw "load word" () 520 "lw $r1,($r0+$imm)" 521 (+ OP_LW r0 r1 imm) 522 (set r1 (mem SI (add r0 (ext SI (trunc HI imm))))) 523 () 524) 525 526(dni modu "unsigned modulus" () 527 "modu $r2,$r0,$r1" 528 (+ OP_MODU r0 r1 r2 (f-resv0 0)) 529 (set pc (c-call USI "@cpu@_modu_insn" pc f-r0 f-r1 f-r2)) 530 () 531) 532 533(dni mul "mulitply" () 534 "mul $r2,$r0,$r1" 535 (+ OP_MUL r0 r1 r2 (f-resv0 0)) 536 (set r2 (mul r0 r1)) 537 () 538) 539 540(dni muli "multiply immediate" () 541 "muli $r1,$r0,$imm" 542 (+ OP_MULI r0 r1 imm) 543 (set r1 (mul r0 (ext SI (trunc HI imm)))) 544 () 545) 546 547(dni nor "nor" () 548 "nor $r2,$r0,$r1" 549 (+ OP_NOR r0 r1 r2 (f-resv0 0)) 550 (set r2 (inv (or r0 r1))) 551 () 552) 553 554(dni nori "nor immediate" () 555 "nori $r1,$r0,$uimm" 556 (+ OP_NORI r0 r1 uimm) 557 (set r1 (inv (or r0 (zext SI uimm)))) 558 () 559) 560 561(dni or "or" () 562 "or $r2,$r0,$r1" 563 (+ OP_OR r0 r1 r2 (f-resv0 0)) 564 (set r2 (or r0 r1)) 565 () 566) 567 568(dni ori "or immediate" () 569 "ori $r1,$r0,$lo16" 570 (+ OP_ORI r0 r1 lo16) 571 (set r1 (or r0 (zext SI lo16))) 572 () 573) 574 575(dni orhii "or high immediate" () 576 "orhi $r1,$r0,$hi16" 577 (+ OP_ORHI r0 r1 hi16) 578 (set r1 (or r0 (sll SI hi16 16))) 579 () 580) 581 582(dni rcsr "read control or status register" () 583 "rcsr $r2,$csr" 584 (+ OP_RCSR csr (f-r1 0) r2 (f-resv0 0)) 585 (set r2 csr) 586 () 587) 588 589(dni sb "store byte" () 590 "sb ($r0+$imm),$r1" 591 (+ OP_SB r0 r1 imm) 592 (set (mem QI (add r0 (ext SI (trunc HI imm)))) r1) 593 () 594) 595 596(dni sextb "sign extend byte" () 597 "sextb $r2,$r0" 598 (+ OP_SEXTB r0 (f-r1 0) r2 (f-resv0 0)) 599 (set r2 (ext SI (trunc QI r0))) 600 () 601) 602 603(dni sexth "sign extend half-word" () 604 "sexth $r2,$r0" 605 (+ OP_SEXTH r0 (f-r1 0) r2 (f-resv0 0)) 606 (set r2 (ext SI (trunc HI r0))) 607 () 608) 609 610(dni sh "store halfword" () 611 "sh ($r0+$imm),$r1" 612 (+ OP_SH r0 r1 imm) 613 (set (mem HI (add r0 (ext SI (trunc HI imm)))) r1) 614 () 615) 616 617(dni sl "shift left" () 618 "sl $r2,$r0,$r1" 619 (+ OP_SL r0 r1 r2 (f-resv0 0)) 620 (set r2 (sll SI r0 r1)) 621 () 622) 623 624(dni sli "shift left immediate" () 625 "sli $r1,$r0,$imm" 626 (+ OP_SLI r0 r1 imm) 627 (set r1 (sll SI r0 imm)) 628 () 629) 630 631(dni sr "shift right" () 632 "sr $r2,$r0,$r1" 633 (+ OP_SR r0 r1 r2 (f-resv0 0)) 634 (set r2 (sra SI r0 r1)) 635 () 636) 637 638(dni sri "shift right immediate" () 639 "sri $r1,$r0,$imm" 640 (+ OP_SRI r0 r1 imm) 641 (set r1 (sra SI r0 imm)) 642 () 643) 644 645(dni sru "shift right unsigned" () 646 "sru $r2,$r0,$r1" 647 (+ OP_SRU r0 r1 r2 (f-resv0 0)) 648 (set r2 (srl SI r0 r1)) 649 () 650) 651 652(dni srui "shift right unsigned immediate" () 653 "srui $r1,$r0,$imm" 654 (+ OP_SRUI r0 r1 imm) 655 (set r1 (srl SI r0 imm)) 656 () 657) 658 659(dni sub "subtract" () 660 "sub $r2,$r0,$r1" 661 (+ OP_SUB r0 r1 r2 (f-resv0 0)) 662 (set r2 (sub r0 r1)) 663 () 664) 665 666(dni sw "store word" () 667 "sw ($r0+$imm),$r1" 668 (+ OP_SW r0 r1 imm) 669 (set (mem SI (add r0 (ext SI (trunc HI imm)))) r1) 670 () 671) 672 673(dni user "user defined instruction" () 674 "user $r2,$r0,$r1,$user" 675 (+ OP_USER r0 r1 r2 user) 676 (set r2 (c-call SI "@cpu@_user_insn" r0 r1 user)) 677 () 678) 679 680(dni wcsr "write control or status register" () 681 "wcsr $csr,$r1" 682 (+ OP_WCSR csr r1 (f-r2 0) (f-resv0 0)) 683 (c-call VOID "@cpu@_wcsr_insn" f-csr r1) 684 () 685) 686 687(dni xor "xor" () 688 "xor $r2,$r0,$r1" 689 (+ OP_XOR r0 r1 r2 (f-resv0 0)) 690 (set r2 (xor r0 r1)) 691 () 692) 693 694(dni xori "xor immediate" () 695 "xori $r1,$r0,$uimm" 696 (+ OP_XORI r0 r1 uimm) 697 (set r1 (xor r0 (zext SI uimm))) 698 () 699) 700 701(dni xnor "xnor" () 702 "xnor $r2,$r0,$r1" 703 (+ OP_XNOR r0 r1 r2 (f-resv0 0)) 704 (set r2 (inv (xor r0 r1))) 705 () 706) 707 708(dni xnori "xnor immediate" () 709 "xnori $r1,$r0,$uimm" 710 (+ OP_XNORI r0 r1 uimm) 711 (set r1 (inv (xor r0 (zext SI uimm)))) 712 () 713) 714 715; Pseudo instructions 716 717(dni break "breakpoint" () 718 "break" 719 (+ OP_RAISE (f-exception 2)) 720 (set pc (c-call USI "@cpu@_break_insn" pc)) 721 () 722) 723 724(dni scall "system call" () 725 "scall" 726 (+ OP_RAISE (f-exception 7)) 727 (set pc (c-call USI "@cpu@_scall_insn" pc)) 728 () 729) 730 731(dni bret "return from breakpoint" (ALIAS) 732 "bret" 733 (+ OP_B (f-r0 31) (f-r1 0) (f-r2 0) (f-resv0 0)) 734 (set pc (c-call USI "@cpu@_bret_insn" r0)) 735 () 736) 737 738(dni eret "return from exception" (ALIAS) 739 "eret" 740 (+ OP_B (f-r0 30) (f-r1 0) (f-r2 0) (f-resv0 0)) 741 (set pc (c-call USI "@cpu@_eret_insn" r0)) 742 () 743) 744 745(dni ret "return" (ALIAS) 746 "ret" 747 (+ OP_B (f-r0 29) (f-r1 0) (f-r2 0) (f-resv0 0)) 748 (set pc r0) 749 () 750) 751 752(dni mv "move" (ALIAS) 753 "mv $r2,$r0" 754 (+ OP_OR r0 (f-r1 0) r2 (f-resv0 0)) 755 (set r2 r0) 756 () 757) 758 759(dni mvi "move immediate" (ALIAS) 760 "mvi $r1,$imm" 761 (+ OP_ADDI (f-r0 0) r1 imm) 762 (set r1 (add r0 (ext SI (trunc HI imm)))) 763 () 764) 765 766(dni mvui "move unsigned immediate" (ALIAS) 767 "mvu $r1,$lo16" 768 (+ OP_ORI (f-r0 0) r1 lo16) 769 (set r1 (zext SI lo16)) 770 () 771) 772 773(dni mvhi "move high immediate" (ALIAS) 774 "mvhi $r1,$hi16" 775 (+ OP_ORHI (f-r0 0) r1 hi16) 776 (set r1 (or r0 (sll SI hi16 16))) 777 () 778) 779 780(dni mva "move address" (ALIAS) 781 "mva $r1,$gp16" 782 (+ OP_ADDI (f-r0 26) r1 gp16) 783 (set r1 (add r0 (ext SI (trunc HI gp16)))) 784 () 785) 786 787(dni not "not" (ALIAS) 788 "not $r2,$r0" 789 (+ OP_XNOR r0 (f-r1 0) r2 (f-resv0 0)) 790 (set r2 (inv r0)) 791 () 792) 793 794(dni nop "nop" (ALIAS) 795 "nop" 796 (+ OP_ADDI (f-r0 0) (f-r1 0) (f-imm 0)) 797 (set r0 r0) 798 () 799) 800 801(dni lbgprel "load byte gp relative" (ALIAS) 802 "lb $r1,$gp16" 803 (+ OP_LB (f-r0 26) r1 gp16) 804 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI gp16)))))) 805 () 806) 807 808(dni lbugprel "load byte unsigned gp relative" (ALIAS) 809 "lbu $r1,$gp16" 810 (+ OP_LBU (f-r0 26) r1 gp16) 811 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI gp16)))))) 812 () 813) 814 815(dni lhgprel "load halfword gp relative" (ALIAS) 816 "lh $r1,$gp16" 817 (+ OP_LH (f-r0 26) r1 gp16) 818 (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI gp16)))))) 819 () 820) 821 822(dni lhugprel "load halfword unsigned gp relative" (ALIAS) 823 "lhu $r1,$gp16" 824 (+ OP_LHU (f-r0 26) r1 gp16) 825 (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI gp16)))))) 826 () 827) 828 829(dni lwgprel "load word gp relative" (ALIAS) 830 "lw $r1,$gp16" 831 (+ OP_LW (f-r0 26) r1 gp16) 832 (set r1 (mem SI (add r0 (ext SI (trunc HI gp16))))) 833 () 834) 835 836(dni sbgprel "store byte gp relative" (ALIAS) 837 "sb $gp16,$r1" 838 (+ OP_SB (f-r0 26) r1 gp16) 839 (set (mem QI (add r0 (ext SI (trunc HI gp16)))) r1) 840 () 841) 842 843(dni shgprel "store halfword gp relative" (ALIAS) 844 "sh $gp16,$r1" 845 (+ OP_SH (f-r0 26) r1 gp16) 846 (set (mem HI (add r0 (ext SI (trunc HI gp16)))) r1) 847 () 848) 849 850(dni swgprel "store word gp relative" (ALIAS) 851 "sw $gp16,$r1" 852 (+ OP_SW (f-r0 26) r1 gp16) 853 (set (mem SI (add r0 (ext SI (trunc HI gp16)))) r1) 854 () 855) 856 857(dni lwgotrel "load word got relative" (ALIAS) 858 "lw $r1,(gp+$got16)" 859 (+ OP_LW (f-r0 26) r1 got16) 860 (set r1 (mem SI (add r0 (ext SI (trunc HI got16))))) 861 () 862) 863 864(dni orhigotoffi "or high got offset immediate" (ALIAS) 865 "orhi $r1,$r0,$gotoffhi16" 866 (+ OP_ORHI r0 r1 gotoffhi16) 867 (set r1 (or r0 (sll SI gotoffhi16 16))) 868 () 869) 870 871(dni addgotoff "add got offset" (ALIAS) 872 "addi $r1,$r0,$gotofflo16" 873 (+ OP_ADDI r0 r1 gotofflo16) 874 (set r1 (add r0 (ext SI (trunc HI gotofflo16)))) 875 () 876) 877 878(dni swgotoff "store word got offset" (ALIAS) 879 "sw ($r0+$gotofflo16),$r1" 880 (+ OP_SW r0 r1 gotofflo16) 881 (set (mem SI (add r0 (ext SI (trunc HI gotofflo16)))) r1) 882 () 883) 884 885(dni lwgotoff "load word got offset" (ALIAS) 886 "lw $r1,($r0+$gotofflo16)" 887 (+ OP_LW r0 r1 gotofflo16) 888 (set r1 (mem SI (add r0 (ext SI (trunc HI gotofflo16))))) 889 () 890) 891 892(dni shgotoff "store half word got offset" (ALIAS) 893 "sh ($r0+$gotofflo16),$r1" 894 (+ OP_SH r0 r1 gotofflo16) 895 (set (mem HI (add r0 (ext SI (trunc HI gotofflo16)))) r1) 896 () 897) 898 899(dni lhgotoff "load half word got offset" (ALIAS) 900 "lh $r1,($r0+$gotofflo16)" 901 (+ OP_LH r0 r1 gotofflo16) 902 (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI gotofflo16)))))) 903 () 904) 905 906(dni lhugotoff "load half word got offset unsigned" (ALIAS) 907 "lhu $r1,($r0+$gotofflo16)" 908 (+ OP_LHU r0 r1 gotofflo16) 909 (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI gotofflo16)))))) 910 () 911) 912 913(dni sbgotoff "store byte got offset" (ALIAS) 914 "sb ($r0+$gotofflo16),$r1" 915 (+ OP_SB r0 r1 gotofflo16) 916 (set (mem QI (add r0 (ext SI (trunc HI gotofflo16)))) r1) 917 () 918) 919 920(dni lbgotoff "load byte got offset" (ALIAS) 921 "lb $r1,($r0+$gotofflo16)" 922 (+ OP_LB r0 r1 gotofflo16) 923 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI gotofflo16)))))) 924 () 925) 926 927(dni lbugotoff "load byte got offset unsigned" (ALIAS) 928 "lbu $r1,($r0+$gotofflo16)" 929 (+ OP_LBU r0 r1 gotofflo16) 930 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI gotofflo16)))))) 931 () 932) 933