1*0fc04c29Smrg /* Copyright (C) 2006-2019 Free Software Foundation, Inc.
263d1a8abSmrg 
363d1a8abSmrg    This file is free software; you can redistribute it and/or modify it under
463d1a8abSmrg    the terms of the GNU General Public License as published by the Free
563d1a8abSmrg    Software Foundation; either version 3 of the License, or (at your option)
663d1a8abSmrg    any later version.
763d1a8abSmrg 
863d1a8abSmrg    This file is distributed in the hope that it will be useful, but WITHOUT
963d1a8abSmrg    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1063d1a8abSmrg    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
1163d1a8abSmrg    for more details.
1263d1a8abSmrg 
1363d1a8abSmrg    Under Section 7 of GPL version 3, you are granted additional
1463d1a8abSmrg    permissions described in the GCC Runtime Library Exception, version
1563d1a8abSmrg    3.1, as published by the Free Software Foundation.
1663d1a8abSmrg 
1763d1a8abSmrg    You should have received a copy of the GNU General Public License and
1863d1a8abSmrg    a copy of the GCC Runtime Library Exception along with this program;
1963d1a8abSmrg    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
2063d1a8abSmrg    <http://www.gnu.org/licenses/>.  */
2163d1a8abSmrg 
2263d1a8abSmrg #include <spu_intrinsics.h>
2363d1a8abSmrg const unsigned char __sidf_pat[16] __attribute__ ((__aligned__ (16))) = {
2463d1a8abSmrg   0x02, 0x03, 0x10, 0x11,
2563d1a8abSmrg   0x12, 0x13, 0x80, 0x80,
2663d1a8abSmrg   0x06, 0x07, 0x14, 0x15,
2763d1a8abSmrg   0x16, 0x17, 0x80, 0x80
2863d1a8abSmrg };
2963d1a8abSmrg 
3063d1a8abSmrg /* double __float_unssidf (unsigned int SI) */
3163d1a8abSmrg qword __float_unssidf (qword SI);
3263d1a8abSmrg qword
__float_unssidf(qword SI)3363d1a8abSmrg __float_unssidf (qword SI)
3463d1a8abSmrg {
3563d1a8abSmrg   qword t0, t1, t2, t3, t4, t5, t6, t7;
3663d1a8abSmrg   t0 = si_clz (SI);
3763d1a8abSmrg   t1 = si_il (1054);
3863d1a8abSmrg   t2 = si_shl (SI, t0);
3963d1a8abSmrg   t3 = si_ceqi (t0, 32);
4063d1a8abSmrg   t4 = si_sf (t0, t1);
4163d1a8abSmrg   t5 = si_a (t2, t2);
4263d1a8abSmrg   t6 = si_andc (t4, t3);
4363d1a8abSmrg   t7 = si_shufb (t6, t5, *(const qword *) __sidf_pat);
4463d1a8abSmrg   return si_shlqbii (t7, 4);
4563d1a8abSmrg }
46