1a1ba9ba4Schristos /* This file defines the interface between the m32c simulator and gdb.
2*184b2d41Schristos    Copyright (C) 2005-2020 Free Software Foundation, Inc.
3a1ba9ba4Schristos 
4a1ba9ba4Schristos    This file is part of GDB.
5a1ba9ba4Schristos 
6a1ba9ba4Schristos    This program is free software; you can redistribute it and/or modify
7a1ba9ba4Schristos    it under the terms of the GNU General Public License as published by
8a1ba9ba4Schristos    the Free Software Foundation; either version 3 of the License, or
9a1ba9ba4Schristos    (at your option) any later version.
10a1ba9ba4Schristos 
11a1ba9ba4Schristos    This program is distributed in the hope that it will be useful,
12a1ba9ba4Schristos    but WITHOUT ANY WARRANTY; without even the implied warranty of
13a1ba9ba4Schristos    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14a1ba9ba4Schristos    GNU General Public License for more details.
15a1ba9ba4Schristos 
16a1ba9ba4Schristos    You should have received a copy of the GNU General Public License
17a1ba9ba4Schristos    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
18a1ba9ba4Schristos 
19a1ba9ba4Schristos #ifndef SIM_M32C_H
20a1ba9ba4Schristos #define SIM_M32C_H
21a1ba9ba4Schristos 
22a1ba9ba4Schristos enum m32c_sim_reg {
23a1ba9ba4Schristos   m32c_sim_reg_r0_bank0,
24a1ba9ba4Schristos   m32c_sim_reg_r1_bank0,
25a1ba9ba4Schristos   m32c_sim_reg_r2_bank0,
26a1ba9ba4Schristos   m32c_sim_reg_r3_bank0,
27a1ba9ba4Schristos   m32c_sim_reg_a0_bank0,
28a1ba9ba4Schristos   m32c_sim_reg_a1_bank0,
29a1ba9ba4Schristos   m32c_sim_reg_fb_bank0,
30a1ba9ba4Schristos   m32c_sim_reg_sb_bank0,
31a1ba9ba4Schristos   m32c_sim_reg_r0_bank1,
32a1ba9ba4Schristos   m32c_sim_reg_r1_bank1,
33a1ba9ba4Schristos   m32c_sim_reg_r2_bank1,
34a1ba9ba4Schristos   m32c_sim_reg_r3_bank1,
35a1ba9ba4Schristos   m32c_sim_reg_a0_bank1,
36a1ba9ba4Schristos   m32c_sim_reg_a1_bank1,
37a1ba9ba4Schristos   m32c_sim_reg_fb_bank1,
38a1ba9ba4Schristos   m32c_sim_reg_sb_bank1,
39a1ba9ba4Schristos   m32c_sim_reg_usp,
40a1ba9ba4Schristos   m32c_sim_reg_isp,
41a1ba9ba4Schristos   m32c_sim_reg_pc,
42a1ba9ba4Schristos   m32c_sim_reg_intb,
43a1ba9ba4Schristos   m32c_sim_reg_flg,
44a1ba9ba4Schristos   m32c_sim_reg_svf,
45a1ba9ba4Schristos   m32c_sim_reg_svp,
46a1ba9ba4Schristos   m32c_sim_reg_vct,
47a1ba9ba4Schristos   m32c_sim_reg_dmd0,
48a1ba9ba4Schristos   m32c_sim_reg_dmd1,
49a1ba9ba4Schristos   m32c_sim_reg_dct0,
50a1ba9ba4Schristos   m32c_sim_reg_dct1,
51a1ba9ba4Schristos   m32c_sim_reg_drc0,
52a1ba9ba4Schristos   m32c_sim_reg_drc1,
53a1ba9ba4Schristos   m32c_sim_reg_dma0,
54a1ba9ba4Schristos   m32c_sim_reg_dma1,
55a1ba9ba4Schristos   m32c_sim_reg_dsa0,
56a1ba9ba4Schristos   m32c_sim_reg_dsa1,
57a1ba9ba4Schristos   m32c_sim_reg_dra0,
58a1ba9ba4Schristos   m32c_sim_reg_dra1,
59a1ba9ba4Schristos   m32c_sim_reg_num_regs
60a1ba9ba4Schristos };
61a1ba9ba4Schristos 
62a1ba9ba4Schristos #endif /* SIM_M32C_H */
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