1c5dff60aSchristos /* Blackfin External Bus Interface Unit (EBIU) DDR Controller (DDRC) Model.
2c5dff60aSchristos
3*1424dfb3Schristos Copyright (C) 2010-2020 Free Software Foundation, Inc.
4c5dff60aSchristos Contributed by Analog Devices, Inc.
5c5dff60aSchristos
6c5dff60aSchristos This file is part of simulators.
7c5dff60aSchristos
8c5dff60aSchristos This program is free software; you can redistribute it and/or modify
9c5dff60aSchristos it under the terms of the GNU General Public License as published by
10c5dff60aSchristos the Free Software Foundation; either version 3 of the License, or
11c5dff60aSchristos (at your option) any later version.
12c5dff60aSchristos
13c5dff60aSchristos This program is distributed in the hope that it will be useful,
14c5dff60aSchristos but WITHOUT ANY WARRANTY; without even the implied warranty of
15c5dff60aSchristos MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16c5dff60aSchristos GNU General Public License for more details.
17c5dff60aSchristos
18c5dff60aSchristos You should have received a copy of the GNU General Public License
19c5dff60aSchristos along with this program. If not, see <http://www.gnu.org/licenses/>. */
20c5dff60aSchristos
21c5dff60aSchristos #include "config.h"
22c5dff60aSchristos
23c5dff60aSchristos #include "sim-main.h"
24c5dff60aSchristos #include "devices.h"
25c5dff60aSchristos #include "dv-bfin_ebiu_ddrc.h"
26c5dff60aSchristos
27c5dff60aSchristos struct bfin_ebiu_ddrc
28c5dff60aSchristos {
29c5dff60aSchristos bu32 base, reg_size, bank_size;
30c5dff60aSchristos
31c5dff60aSchristos /* Order after here is important -- matches hardware MMR layout. */
32c5dff60aSchristos union {
33c5dff60aSchristos struct { bu32 ddrctl0, ddrctl1, ddrctl2, ddrctl3; };
34c5dff60aSchristos bu32 ddrctl[4];
35c5dff60aSchristos };
36c5dff60aSchristos bu32 ddrque, erradd;
37c5dff60aSchristos bu16 BFIN_MMR_16(errmst);
38c5dff60aSchristos bu16 BFIN_MMR_16(rstctl);
39c5dff60aSchristos bu32 ddrbrc[8], ddrbwc[8];
40c5dff60aSchristos bu32 ddracct, ddrtact, ddrarct;
41c5dff60aSchristos bu32 ddrgc[4];
42c5dff60aSchristos bu32 ddrmcen, ddrmccl;
43c5dff60aSchristos };
44c5dff60aSchristos #define mmr_base() offsetof(struct bfin_ebiu_ddrc, ddrctl0)
45c5dff60aSchristos #define mmr_offset(mmr) (offsetof(struct bfin_ebiu_ddrc, mmr) - mmr_base())
46c5dff60aSchristos
47c5dff60aSchristos static const char * const mmr_names[] =
48c5dff60aSchristos {
49c5dff60aSchristos "EBIU_DDRCTL0", "EBIU_DDRCTL1", "EBIU_DDRCTL2", "EBIU_DDRCTL3", "EBIU_DDRQUE",
50c5dff60aSchristos "EBIU_ERRADD", "EBIU_ERRMST", "EBIU_RSTCTL", "EBIU_DDRBRC0", "EBIU_DDRBRC1",
51c5dff60aSchristos "EBIU_DDRBRC2", "EBIU_DDRBRC3", "EBIU_DDRBRC4", "EBIU_DDRBRC5",
52c5dff60aSchristos "EBIU_DDRBRC6", "EBIU_DDRBRC7", "EBIU_DDRBWC0", "EBIU_DDRBWC1"
53c5dff60aSchristos "EBIU_DDRBWC2", "EBIU_DDRBWC3", "EBIU_DDRBWC4", "EBIU_DDRBWC5",
54c5dff60aSchristos "EBIU_DDRBWC6", "EBIU_DDRBWC7", "EBIU_DDRACCT", "EBIU_DDRTACT",
55c5dff60aSchristos "EBIU_ARCT", "EBIU_DDRGC0", "EBIU_DDRGC1", "EBIU_DDRGC2", "EBIU_DDRGC3",
56c5dff60aSchristos "EBIU_DDRMCEN", "EBIU_DDRMCCL",
57c5dff60aSchristos };
58c5dff60aSchristos #define mmr_name(off) mmr_names[(off) / 4]
59c5dff60aSchristos
60c5dff60aSchristos static unsigned
bfin_ebiu_ddrc_io_write_buffer(struct hw * me,const void * source,int space,address_word addr,unsigned nr_bytes)61c5dff60aSchristos bfin_ebiu_ddrc_io_write_buffer (struct hw *me, const void *source,
62c5dff60aSchristos int space, address_word addr, unsigned nr_bytes)
63c5dff60aSchristos {
64c5dff60aSchristos struct bfin_ebiu_ddrc *ddrc = hw_data (me);
65c5dff60aSchristos bu32 mmr_off;
66c5dff60aSchristos bu32 value;
67c5dff60aSchristos bu16 *value16p;
68c5dff60aSchristos bu32 *value32p;
69c5dff60aSchristos void *valuep;
70c5dff60aSchristos
71c03b94e9Schristos /* Invalid access mode is higher priority than missing register. */
72c03b94e9Schristos if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true))
73c03b94e9Schristos return 0;
74c03b94e9Schristos
75c5dff60aSchristos if (nr_bytes == 4)
76c5dff60aSchristos value = dv_load_4 (source);
77c5dff60aSchristos else
78c5dff60aSchristos value = dv_load_2 (source);
79c5dff60aSchristos
80c5dff60aSchristos mmr_off = addr - ddrc->base;
81c5dff60aSchristos valuep = (void *)((unsigned long)ddrc + mmr_base() + mmr_off);
82c5dff60aSchristos value16p = valuep;
83c5dff60aSchristos value32p = valuep;
84c5dff60aSchristos
85c5dff60aSchristos HW_TRACE_WRITE ();
86c5dff60aSchristos
87c5dff60aSchristos switch (mmr_off)
88c5dff60aSchristos {
89c5dff60aSchristos case mmr_offset(errmst):
90c5dff60aSchristos case mmr_offset(rstctl):
91c03b94e9Schristos if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
92c03b94e9Schristos return 0;
93c5dff60aSchristos *value16p = value;
94c5dff60aSchristos break;
95c5dff60aSchristos default:
96c03b94e9Schristos if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true))
97c03b94e9Schristos return 0;
98c5dff60aSchristos *value32p = value;
99c5dff60aSchristos break;
100c5dff60aSchristos }
101c5dff60aSchristos
102c5dff60aSchristos return nr_bytes;
103c5dff60aSchristos }
104c5dff60aSchristos
105c5dff60aSchristos static unsigned
bfin_ebiu_ddrc_io_read_buffer(struct hw * me,void * dest,int space,address_word addr,unsigned nr_bytes)106c5dff60aSchristos bfin_ebiu_ddrc_io_read_buffer (struct hw *me, void *dest,
107c5dff60aSchristos int space, address_word addr, unsigned nr_bytes)
108c5dff60aSchristos {
109c5dff60aSchristos struct bfin_ebiu_ddrc *ddrc = hw_data (me);
110c5dff60aSchristos bu32 mmr_off;
111c5dff60aSchristos bu32 *value32p;
112c5dff60aSchristos bu16 *value16p;
113c5dff60aSchristos void *valuep;
114c5dff60aSchristos
115c03b94e9Schristos /* Invalid access mode is higher priority than missing register. */
116c03b94e9Schristos if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true))
117c03b94e9Schristos return 0;
118c03b94e9Schristos
119c5dff60aSchristos mmr_off = addr - ddrc->base;
120c5dff60aSchristos valuep = (void *)((unsigned long)ddrc + mmr_base() + mmr_off);
121c5dff60aSchristos value16p = valuep;
122c5dff60aSchristos value32p = valuep;
123c5dff60aSchristos
124c5dff60aSchristos HW_TRACE_READ ();
125c5dff60aSchristos
126c5dff60aSchristos switch (mmr_off)
127c5dff60aSchristos {
128c5dff60aSchristos case mmr_offset(errmst):
129c5dff60aSchristos case mmr_offset(rstctl):
130c03b94e9Schristos if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false))
131c03b94e9Schristos return 0;
132c5dff60aSchristos dv_store_2 (dest, *value16p);
133c5dff60aSchristos break;
134c5dff60aSchristos default:
135c03b94e9Schristos if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false))
136c03b94e9Schristos return 0;
137c5dff60aSchristos dv_store_4 (dest, *value32p);
138c5dff60aSchristos break;
139c5dff60aSchristos }
140c5dff60aSchristos
141c5dff60aSchristos return nr_bytes;
142c5dff60aSchristos }
143c5dff60aSchristos
144c5dff60aSchristos static void
attach_bfin_ebiu_ddrc_regs(struct hw * me,struct bfin_ebiu_ddrc * ddrc)145c5dff60aSchristos attach_bfin_ebiu_ddrc_regs (struct hw *me, struct bfin_ebiu_ddrc *ddrc)
146c5dff60aSchristos {
147c5dff60aSchristos address_word attach_address;
148c5dff60aSchristos int attach_space;
149c5dff60aSchristos unsigned attach_size;
150c5dff60aSchristos reg_property_spec reg;
151c5dff60aSchristos
152c5dff60aSchristos if (hw_find_property (me, "reg") == NULL)
153c5dff60aSchristos hw_abort (me, "Missing \"reg\" property");
154c5dff60aSchristos
155c5dff60aSchristos if (!hw_find_reg_array_property (me, "reg", 0, ®))
156c5dff60aSchristos hw_abort (me, "\"reg\" property must contain three addr/size entries");
157c5dff60aSchristos
158c5dff60aSchristos hw_unit_address_to_attach_address (hw_parent (me),
159c5dff60aSchristos ®.address,
160c5dff60aSchristos &attach_space, &attach_address, me);
161c5dff60aSchristos hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me);
162c5dff60aSchristos
163c5dff60aSchristos if (attach_size != BFIN_MMR_EBIU_DDRC_SIZE)
164c5dff60aSchristos hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_EBIU_DDRC_SIZE);
165c5dff60aSchristos
166c5dff60aSchristos hw_attach_address (hw_parent (me),
167c5dff60aSchristos 0, attach_space, attach_address, attach_size, me);
168c5dff60aSchristos
169c5dff60aSchristos ddrc->base = attach_address;
170c5dff60aSchristos }
171c5dff60aSchristos
172c5dff60aSchristos static void
bfin_ebiu_ddrc_finish(struct hw * me)173c5dff60aSchristos bfin_ebiu_ddrc_finish (struct hw *me)
174c5dff60aSchristos {
175c5dff60aSchristos struct bfin_ebiu_ddrc *ddrc;
176c5dff60aSchristos
177c5dff60aSchristos ddrc = HW_ZALLOC (me, struct bfin_ebiu_ddrc);
178c5dff60aSchristos
179c5dff60aSchristos set_hw_data (me, ddrc);
180c5dff60aSchristos set_hw_io_read_buffer (me, bfin_ebiu_ddrc_io_read_buffer);
181c5dff60aSchristos set_hw_io_write_buffer (me, bfin_ebiu_ddrc_io_write_buffer);
182c5dff60aSchristos
183c5dff60aSchristos attach_bfin_ebiu_ddrc_regs (me, ddrc);
184c5dff60aSchristos
185c5dff60aSchristos /* Initialize the DDRC. */
186c5dff60aSchristos ddrc->ddrctl0 = 0x098E8411;
187c5dff60aSchristos ddrc->ddrctl1 = 0x10026223;
188c5dff60aSchristos ddrc->ddrctl2 = 0x00000021;
189c5dff60aSchristos ddrc->ddrctl3 = 0x00000003; /* XXX: MDDR is 0x20 ... */
190c5dff60aSchristos ddrc->ddrque = 0x00001115;
191c5dff60aSchristos ddrc->rstctl = 0x0002;
192c5dff60aSchristos }
193c5dff60aSchristos
194c5dff60aSchristos const struct hw_descriptor dv_bfin_ebiu_ddrc_descriptor[] =
195c5dff60aSchristos {
196c5dff60aSchristos {"bfin_ebiu_ddrc", bfin_ebiu_ddrc_finish,},
197c5dff60aSchristos {NULL, NULL},
198c5dff60aSchristos };
199