xref: /netbsd/sys/arch/arm/arm32/arm11_pmc.c (revision 497ad467)
1 /*	$NetBSD: arm11_pmc.c,v 1.7 2020/06/20 07:01:16 skrll Exp $	*/
2 
3 /* Copyright (c) 2007 Microsoft
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by Microsoft
17  *
18  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 
32 /*
33  * support for ARM 11 Performance Monitor Counters
34  */
35 
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: arm11_pmc.c,v 1.7 2020/06/20 07:01:16 skrll Exp $");
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/time.h>
43 #include <sys/timetc.h>
44 #include <dev/clock_subr.h>
45 #include <arm/armreg.h>
46 #include <arm/cpufunc.h>
47 
48 #ifndef ARM11_PMC_CCNT_HZ
49 # define ARM11_PMC_CCNT_HZ	400000000	/* 400MHz */
50 #endif
51 
52 void arm11_pmc_ccnt_init(void);
53 
54 #define COUNTS_PER_USEC	(ARM11_PMC_CCNT_HZ / 1000000)
55 
56 static uint32_t counts_per_wrap = ~0UL;		/* XXX off by 1 */
57 
58 static inline uint32_t
59 arm11_pmc_ctrl_read(void)
60 {
61 	uint32_t val;
62 
63 	__asm volatile ("mrc p15, 0, %0, c15, c12, 0" : "=r" (val));
64 
65 	return val;
66 }
67 
68 static inline void
69 arm11_pmc_ctrl_write(uint32_t val)
70 {
71 	__asm volatile ("mcr p15, 0, %0, c15, c12, 0" :: "r" (val));
72 }
73 
74 static inline uint32_t
75 arm11_pmc_ccnt_read(void)
76 {
77 	uint32_t val;
78 
79 	__asm volatile ("mrc p15, 0, %0, c15, c12, 1" : "=r" (val));
80 
81 	return val;
82 }
83 
84 __unused static inline void
85 arm11_pmc_ccnt_write(uint32_t val)
86 {
87 	__asm volatile ("mcr p15, 0, %0, c15, c12, 1;" :: "r" (val));
88 }
89 
90 /*
91  * enable the PMC CCNT for delay()
92  */
93 void
94 arm11_pmc_ccnt_init(void)
95 {
96 	uint32_t val;
97 
98 	val = ARM11_PMCCTL_E | ARM11_PMCCTL_P | ARM11_PMCCTL_C;
99 
100 	arm11_pmc_ctrl_write(val);
101 }
102 
103 /*
104  * delay - for "at least" arg usec
105  *
106  *	NOTE: at 400MHz we are restricted to (uint32_t)~0 "counts"
107  *	if this is a problem, accumulate counts in LL vars
108  */
109 #define DELAY_ARG_LIMIT (((uint32_t)~0) / COUNTS_PER_USEC)	/* about 10 sec */
110 void
111 delay(u_int arg)
112 {
113 	uint32_t ctrl;
114 	uint32_t cur;
115 	uint32_t last;
116 	uint32_t delta = 0;
117 	uint32_t usecs = 0;
118 
119 	if (arg > DELAY_ARG_LIMIT)
120 		panic("delay: arg %u overflow, limit is %d usec\n", arg, DELAY_ARG_LIMIT);
121 
122 	last = arm11_pmc_ccnt_read();
123 	delta = usecs = 0;
124 
125 	while (arg > usecs) {
126 		cur  = arm11_pmc_ccnt_read();
127 		ctrl = arm11_pmc_ctrl_read();
128 		if (ctrl & ARM11_PMCCTL_CCR) {
129 			/*
130 			 * reset CCR, do not reset other write-to-clear flags;
131 			 * keep the rest of the PMC Control Reg configuration
132 			 */
133 			ctrl &= ~(ARM11_PMCCTL_CR0|ARM11_PMCCTL_CR1);
134 			arm11_pmc_ctrl_write(ctrl);
135 			delta += (last + (counts_per_wrap - cur));
136 		} else {
137 			delta += (cur - last);
138 		}
139 		last = cur;
140 		if (delta >= COUNTS_PER_USEC) {
141 			usecs += delta / COUNTS_PER_USEC;
142 			delta %= COUNTS_PER_USEC;
143 		}
144 	}
145 }
146