1*d842b471Sthorpej /* $NetBSD: iomd_irqhandler.c,v 1.24 2020/11/20 18:18:51 thorpej Exp $ */
27d4a1addSreinoud
37d4a1addSreinoud /*
47d4a1addSreinoud * Copyright (c) 1994-1998 Mark Brinicombe.
57d4a1addSreinoud * Copyright (c) 1994 Brini.
67d4a1addSreinoud * All rights reserved.
77d4a1addSreinoud *
87d4a1addSreinoud * This code is derived from software written for Brini by Mark Brinicombe
97d4a1addSreinoud *
107d4a1addSreinoud * Redistribution and use in source and binary forms, with or without
117d4a1addSreinoud * modification, are permitted provided that the following conditions
127d4a1addSreinoud * are met:
137d4a1addSreinoud * 1. Redistributions of source code must retain the above copyright
147d4a1addSreinoud * notice, this list of conditions and the following disclaimer.
157d4a1addSreinoud * 2. Redistributions in binary form must reproduce the above copyright
167d4a1addSreinoud * notice, this list of conditions and the following disclaimer in the
177d4a1addSreinoud * documentation and/or other materials provided with the distribution.
187d4a1addSreinoud * 3. All advertising materials mentioning features or use of this software
197d4a1addSreinoud * must display the following acknowledgement:
207d4a1addSreinoud * This product includes software developed by Mark Brinicombe
217d4a1addSreinoud * for the NetBSD Project.
227d4a1addSreinoud * 4. The name of the company nor the name of the author may be used to
237d4a1addSreinoud * endorse or promote products derived from this software without specific
247d4a1addSreinoud * prior written permission.
257d4a1addSreinoud *
267d4a1addSreinoud * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
277d4a1addSreinoud * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
287d4a1addSreinoud * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
297d4a1addSreinoud * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
307d4a1addSreinoud * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
317d4a1addSreinoud * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
327d4a1addSreinoud * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
337d4a1addSreinoud * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
347d4a1addSreinoud * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
357d4a1addSreinoud * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
367d4a1addSreinoud *
377d4a1addSreinoud * IRQ/FIQ initialisation, claim, release and handler routines
387d4a1addSreinoud *
397d4a1addSreinoud * from: irqhandler.c,v 1.14 1997/04/02 21:52:19 christos Exp $
407d4a1addSreinoud */
417d4a1addSreinoud
4208716eaeSlukem #include <sys/cdefs.h>
43*d842b471Sthorpej __KERNEL_RCSID(0, "$NetBSD: iomd_irqhandler.c,v 1.24 2020/11/20 18:18:51 thorpej Exp $");
4408716eaeSlukem
457d4a1addSreinoud #include "opt_irqstats.h"
467d4a1addSreinoud
477d4a1addSreinoud #include <sys/param.h>
487d4a1addSreinoud #include <sys/systm.h>
497d4a1addSreinoud #include <sys/syslog.h>
50*d842b471Sthorpej #include <sys/kmem.h>
517d4a1addSreinoud
523ea8b768Sskrll #include <arm/cpufunc.h>
537d4a1addSreinoud #include <arm/iomd/iomdreg.h>
547d4a1addSreinoud #include <arm/iomd/iomdvar.h>
557d4a1addSreinoud
5628466919Sthorpej #include <machine/intr.h>
577d4a1addSreinoud #include <machine/cpu.h>
587d4a1addSreinoud
597d4a1addSreinoud irqhandler_t *irqhandlers[NIRQS];
607d4a1addSreinoud
617d4a1addSreinoud u_int current_mask;
627d4a1addSreinoud u_int actual_mask;
637d4a1addSreinoud u_int disabled_mask;
64825088edSmatt u_int irqmasks[NIPL];
657d4a1addSreinoud
667d4a1addSreinoud extern char *_intrnames;
677d4a1addSreinoud
687d4a1addSreinoud /* Prototypes */
697d4a1addSreinoud
70758ec341Sbjh21 extern void set_spl_masks(void);
717d4a1addSreinoud
727d4a1addSreinoud /*
737d4a1addSreinoud * void irq_init(void)
747d4a1addSreinoud *
757d4a1addSreinoud * Initialise the IRQ/FIQ sub system
767d4a1addSreinoud */
777d4a1addSreinoud
787d4a1addSreinoud void
irq_init(void)79758ec341Sbjh21 irq_init(void)
807d4a1addSreinoud {
817d4a1addSreinoud int loop;
827d4a1addSreinoud
837d4a1addSreinoud /* Clear all the IRQ handlers and the irq block masks */
84758ec341Sbjh21 for (loop = 0; loop < NIRQS; ++loop)
857d4a1addSreinoud irqhandlers[loop] = NULL;
867d4a1addSreinoud
877d4a1addSreinoud /* Clear the IRQ/FIQ masks in the IOMD */
887d4a1addSreinoud IOMD_WRITE_BYTE(IOMD_IRQMSKA, 0x00);
897d4a1addSreinoud IOMD_WRITE_BYTE(IOMD_IRQMSKB, 0x00);
907d4a1addSreinoud
917d4a1addSreinoud switch (IOMD_ID) {
927d4a1addSreinoud case RPC600_IOMD_ID:
937d4a1addSreinoud break;
947d4a1addSreinoud case ARM7500_IOC_ID:
957d4a1addSreinoud case ARM7500FE_IOC_ID:
967d4a1addSreinoud IOMD_WRITE_BYTE(IOMD_IRQMSKC, 0x00);
977d4a1addSreinoud IOMD_WRITE_BYTE(IOMD_IRQMSKD, 0x00);
987d4a1addSreinoud break;
997d4a1addSreinoud default:
1007d4a1addSreinoud printf("Unknown IOMD id (%d) found in irq_init()\n", IOMD_ID);
101758ec341Sbjh21 }
1027d4a1addSreinoud
1037d4a1addSreinoud IOMD_WRITE_BYTE(IOMD_FIQMSK, 0x00);
1047d4a1addSreinoud IOMD_WRITE_BYTE(IOMD_DMAMSK, 0x00);
1057d4a1addSreinoud
1067d4a1addSreinoud /*
1077d4a1addSreinoud * Setup the irqmasks for the different Interrupt Priority Levels
1087d4a1addSreinoud * We will start with no bits set and these will be updated as handlers
1097d4a1addSreinoud * are installed at different IPL's.
1107d4a1addSreinoud */
111825088edSmatt for (loop = 0; loop < NIPL; ++loop)
1127d4a1addSreinoud irqmasks[loop] = 0;
1137d4a1addSreinoud
1147d4a1addSreinoud current_mask = 0x00000000;
1157d4a1addSreinoud disabled_mask = 0x00000000;
1167d4a1addSreinoud actual_mask = 0x00000000;
1177d4a1addSreinoud
1187d4a1addSreinoud set_spl_masks();
1197d4a1addSreinoud
1207d4a1addSreinoud /* Enable IRQ's and FIQ's */
1217d4a1addSreinoud enable_interrupts(I32_bit | F32_bit);
1227d4a1addSreinoud }
1237d4a1addSreinoud
1247d4a1addSreinoud
1257d4a1addSreinoud /*
1267d4a1addSreinoud * int irq_claim(int irq, irqhandler_t *handler)
1277d4a1addSreinoud *
1287d4a1addSreinoud * Enable an IRQ and install a handler for it.
1297d4a1addSreinoud */
1307d4a1addSreinoud
1317d4a1addSreinoud int
irq_claim(int irq,irqhandler_t * handler)132758ec341Sbjh21 irq_claim(int irq, irqhandler_t *handler)
1337d4a1addSreinoud {
1347d4a1addSreinoud int level;
135078c5853Schris u_int oldirqstate;
1367d4a1addSreinoud
1377d4a1addSreinoud #ifdef DIAGNOSTIC
1387d4a1addSreinoud /* Sanity check */
1397d4a1addSreinoud if (handler == NULL)
1400f09ed48Sprovos panic("NULL interrupt handler");
1417d4a1addSreinoud if (handler->ih_func == NULL)
1420f09ed48Sprovos panic("Interrupt handler does not have a function");
1437d4a1addSreinoud #endif /* DIAGNOSTIC */
1447d4a1addSreinoud
1457d4a1addSreinoud /*
1467d4a1addSreinoud * IRQ_INSTRUCT indicates that we should get the irq number
1477d4a1addSreinoud * from the irq structure
1487d4a1addSreinoud */
1497d4a1addSreinoud if (irq == IRQ_INSTRUCT)
1507d4a1addSreinoud irq = handler->ih_num;
1517d4a1addSreinoud
1527d4a1addSreinoud /* Make sure the irq number is valid */
1537d4a1addSreinoud if (irq < 0 || irq >= NIRQS)
154758ec341Sbjh21 return -1;
1557d4a1addSreinoud
1567d4a1addSreinoud /* Make sure the level is valid */
157825088edSmatt if (handler->ih_level < 0 || handler->ih_level >= NIPL)
158758ec341Sbjh21 return -1;
1597d4a1addSreinoud
160078c5853Schris oldirqstate = disable_interrupts(I32_bit);
161078c5853Schris
1627d4a1addSreinoud /* Attach handler at top of chain */
1637d4a1addSreinoud handler->ih_next = irqhandlers[irq];
1647d4a1addSreinoud irqhandlers[irq] = handler;
1657d4a1addSreinoud
1667d4a1addSreinoud /*
1677d4a1addSreinoud * Reset the flags for this handler.
1687d4a1addSreinoud * As the handler is now in the chain mark it as active.
1697d4a1addSreinoud */
1707d4a1addSreinoud handler->ih_flags = 0 | IRQ_FLAG_ACTIVE;
1717d4a1addSreinoud
1727d4a1addSreinoud /*
1737d4a1addSreinoud * Record the interrupt number for accounting.
1747d4a1addSreinoud * Done here as the accounting number may not be the same as the
1757d4a1addSreinoud * IRQ number though for the moment they are
1767d4a1addSreinoud */
1777d4a1addSreinoud handler->ih_num = irq;
1787d4a1addSreinoud
1797d4a1addSreinoud #ifdef IRQSTATS
1807d4a1addSreinoud /* Get the interrupt name from the head of the list */
18119d00a40Schristos char *iptr = _intrnames + (irq * 14);
1827d4a1addSreinoud if (handler->ih_name) {
1838f7b9a5cSchristos strlcpy(iptr, handler->ih_name, 14);
1847d4a1addSreinoud } else {
18519d00a40Schristos snprintf(iptr, 14, "irq %2d ", irq);
1867d4a1addSreinoud }
1877d4a1addSreinoud #endif /* IRQSTATS */
1887d4a1addSreinoud
1897d4a1addSreinoud /*
1907d4a1addSreinoud * Update the irq masks.
1917d4a1addSreinoud * Find the lowest interrupt priority on the irq chain.
1927d4a1addSreinoud * Interrupt is allowable at priorities lower than this.
1937d4a1addSreinoud * If ih_level is out of range then don't bother to update
1947d4a1addSreinoud * the masks.
1957d4a1addSreinoud */
196825088edSmatt if (handler->ih_level >= 0 && handler->ih_level < NIPL) {
1977d4a1addSreinoud irqhandler_t *ptr;
1987d4a1addSreinoud
1997d4a1addSreinoud /*
2007d4a1addSreinoud * Find the lowest interrupt priority on the irq chain.
2017d4a1addSreinoud * Interrupt is allowable at priorities lower than this.
2027d4a1addSreinoud */
2037d4a1addSreinoud ptr = irqhandlers[irq];
2047d4a1addSreinoud if (ptr) {
2057d4a1addSreinoud int max_level;
2067d4a1addSreinoud
2077d4a1addSreinoud level = ptr->ih_level - 1;
2087d4a1addSreinoud max_level = ptr->ih_level - 1;
2097d4a1addSreinoud while (ptr) {
2107d4a1addSreinoud if (ptr->ih_level - 1 < level)
2117d4a1addSreinoud level = ptr->ih_level - 1;
2127d4a1addSreinoud else if (ptr->ih_level - 1 > max_level)
2137d4a1addSreinoud max_level = ptr->ih_level - 1;
2147d4a1addSreinoud ptr = ptr->ih_next;
2157d4a1addSreinoud }
2167d4a1addSreinoud /* Clear out any levels that we cannot now allow */
2177d4a1addSreinoud while (max_level >=0 && max_level > level) {
2187d4a1addSreinoud irqmasks[max_level] &= ~(1 << irq);
2197d4a1addSreinoud --max_level;
2207d4a1addSreinoud }
2217d4a1addSreinoud while (level >= 0) {
2227d4a1addSreinoud irqmasks[level] |= (1 << irq);
2237d4a1addSreinoud --level;
2247d4a1addSreinoud }
2257d4a1addSreinoud }
2267d4a1addSreinoud
2277d4a1addSreinoud #include "sl.h"
2287d4a1addSreinoud #include "ppp.h"
2297d4a1addSreinoud #if NSL > 0 || NPPP > 0
2307d4a1addSreinoud /* In the presence of SLIP or PPP, splimp > spltty. */
2317d4a1addSreinoud irqmasks[IPL_NET] &= irqmasks[IPL_TTY];
2327d4a1addSreinoud #endif
2337d4a1addSreinoud }
2347d4a1addSreinoud
2357d4a1addSreinoud enable_irq(irq);
2367d4a1addSreinoud set_spl_masks();
237078c5853Schris restore_interrupts(oldirqstate);
2387d4a1addSreinoud
239758ec341Sbjh21 return 0;
2407d4a1addSreinoud }
2417d4a1addSreinoud
2427d4a1addSreinoud
2437d4a1addSreinoud /*
2447d4a1addSreinoud * int irq_release(int irq, irqhandler_t *handler)
2457d4a1addSreinoud *
2467d4a1addSreinoud * Disable an IRQ and remove a handler for it.
2477d4a1addSreinoud */
2487d4a1addSreinoud
2497d4a1addSreinoud int
irq_release(int irq,irqhandler_t * handler)250758ec341Sbjh21 irq_release(int irq, irqhandler_t *handler)
2517d4a1addSreinoud {
2527d4a1addSreinoud int level;
2537d4a1addSreinoud irqhandler_t *irqhand;
2547d4a1addSreinoud irqhandler_t **prehand;
2557d4a1addSreinoud
2567d4a1addSreinoud /*
2577d4a1addSreinoud * IRQ_INSTRUCT indicates that we should get the irq number
2587d4a1addSreinoud * from the irq structure
2597d4a1addSreinoud */
2607d4a1addSreinoud if (irq == IRQ_INSTRUCT)
2617d4a1addSreinoud irq = handler->ih_num;
2627d4a1addSreinoud
2637d4a1addSreinoud /* Make sure the irq number is valid */
2647d4a1addSreinoud if (irq < 0 || irq >= NIRQS)
2657d4a1addSreinoud return(-1);
2667d4a1addSreinoud
2677d4a1addSreinoud /* Locate the handler */
2687d4a1addSreinoud irqhand = irqhandlers[irq];
2697d4a1addSreinoud prehand = &irqhandlers[irq];
2707d4a1addSreinoud
2717d4a1addSreinoud while (irqhand && handler != irqhand) {
2727d4a1addSreinoud prehand = &irqhand->ih_next;
2737d4a1addSreinoud irqhand = irqhand->ih_next;
2747d4a1addSreinoud }
2757d4a1addSreinoud
2767d4a1addSreinoud /* Remove the handler if located */
2777d4a1addSreinoud if (irqhand)
2787d4a1addSreinoud *prehand = irqhand->ih_next;
2797d4a1addSreinoud else
280758ec341Sbjh21 return -1;
2817d4a1addSreinoud
2827d4a1addSreinoud /* Now the handler has been removed from the chain mark is as inactive */
2837d4a1addSreinoud irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE;
2847d4a1addSreinoud
2857d4a1addSreinoud /* Make sure the head of the handler list is active */
2867d4a1addSreinoud if (irqhandlers[irq])
2877d4a1addSreinoud irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE;
2887d4a1addSreinoud
2897d4a1addSreinoud #ifdef IRQSTATS
2907d4a1addSreinoud /* Get the interrupt name from the head of the list */
29119d00a40Schristos char *iptr = _intrnames + (irq * 14);
2927d4a1addSreinoud if (irqhandlers[irq] && irqhandlers[irq]->ih_name) {
29319d00a40Schristos strlcpy(iptr, irqhandlers[irq]->ih_name, 14);
2947d4a1addSreinoud } else {
29519d00a40Schristos snprintf(iptr, 14, "irq %2d ", irq);
2967d4a1addSreinoud }
2977d4a1addSreinoud #endif /* IRQSTATS */
2987d4a1addSreinoud
2997d4a1addSreinoud /*
3007d4a1addSreinoud * Update the irq masks.
3017d4a1addSreinoud * If ih_level is out of range then don't bother to update
3027d4a1addSreinoud * the masks.
3037d4a1addSreinoud */
304825088edSmatt if (handler->ih_level >= 0 && handler->ih_level < NIPL) {
3057d4a1addSreinoud irqhandler_t *ptr;
3067d4a1addSreinoud
3077d4a1addSreinoud /* Clean the bit from all the masks */
308825088edSmatt for (level = 0; level < NIPL; ++level)
3097d4a1addSreinoud irqmasks[level] &= ~(1 << irq);
3107d4a1addSreinoud
3117d4a1addSreinoud /*
3127d4a1addSreinoud * Find the lowest interrupt priority on the irq chain.
3137d4a1addSreinoud * Interrupt is allowable at priorities lower than this.
3147d4a1addSreinoud */
3157d4a1addSreinoud ptr = irqhandlers[irq];
3167d4a1addSreinoud if (ptr) {
3177d4a1addSreinoud level = ptr->ih_level - 1;
3187d4a1addSreinoud while (ptr) {
3197d4a1addSreinoud if (ptr->ih_level - 1 < level)
3207d4a1addSreinoud level = ptr->ih_level - 1;
3217d4a1addSreinoud ptr = ptr->ih_next;
3227d4a1addSreinoud }
3237d4a1addSreinoud while (level >= 0) {
3247d4a1addSreinoud irqmasks[level] |= (1 << irq);
3257d4a1addSreinoud --level;
3267d4a1addSreinoud }
3277d4a1addSreinoud }
3287d4a1addSreinoud }
3297d4a1addSreinoud
3307d4a1addSreinoud /*
3317d4a1addSreinoud * Disable the appropriate mask bit if there are no handlers left for
3327d4a1addSreinoud * this IRQ.
3337d4a1addSreinoud */
3347d4a1addSreinoud if (irqhandlers[irq] == NULL)
3357d4a1addSreinoud disable_irq(irq);
3367d4a1addSreinoud
3377d4a1addSreinoud set_spl_masks();
3387d4a1addSreinoud
339758ec341Sbjh21 return 0;
3407d4a1addSreinoud }
3417d4a1addSreinoud
3427d4a1addSreinoud
3437d4a1addSreinoud void *
intr_claim(int irq,int level,const char * name,int (* ih_func)(void *),void * ih_arg)344758ec341Sbjh21 intr_claim(int irq, int level, const char *name, int (*ih_func)(void *),
345758ec341Sbjh21 void *ih_arg)
3467d4a1addSreinoud {
3477d4a1addSreinoud irqhandler_t *ih;
3487d4a1addSreinoud
349*d842b471Sthorpej ih = kmem_alloc(sizeof(*ih), KM_SLEEP);
3507d4a1addSreinoud ih->ih_level = level;
3517d4a1addSreinoud ih->ih_name = name;
3527d4a1addSreinoud ih->ih_func = ih_func;
3537d4a1addSreinoud ih->ih_arg = ih_arg;
3547d4a1addSreinoud ih->ih_flags = 0;
3557d4a1addSreinoud
3565d79250aSchristos if (irq_claim(irq, ih) != 0) {
357*d842b471Sthorpej kmem_free(ih, sizeof(*ih));
358758ec341Sbjh21 return NULL;
3595d79250aSchristos }
360758ec341Sbjh21 return ih;
3617d4a1addSreinoud }
3627d4a1addSreinoud
3637d4a1addSreinoud
3647d4a1addSreinoud int
intr_release(void * arg)365758ec341Sbjh21 intr_release(void *arg)
3667d4a1addSreinoud {
3677d4a1addSreinoud irqhandler_t *ih = (irqhandler_t *)arg;
3687d4a1addSreinoud
3697d4a1addSreinoud if (irq_release(ih->ih_num, ih) == 0) {
370*d842b471Sthorpej kmem_free(ih, sizeof(*ih));
371758ec341Sbjh21 return 0 ;
3727d4a1addSreinoud }
373758ec341Sbjh21 return 1;
3747d4a1addSreinoud }
3757d4a1addSreinoud
3767d4a1addSreinoud #if 0
3777d4a1addSreinoud u_int
378758ec341Sbjh21 disable_interrupts(u_int mask)
3797d4a1addSreinoud {
3807d4a1addSreinoud u_int cpsr;
3817d4a1addSreinoud
3827d4a1addSreinoud cpsr = SetCPSR(mask, mask);
383758ec341Sbjh21 return cpsr;
3847d4a1addSreinoud }
3857d4a1addSreinoud
3867d4a1addSreinoud
3877d4a1addSreinoud u_int
388758ec341Sbjh21 restore_interrupts(u_int old_cpsr)
3897d4a1addSreinoud {
3907d4a1addSreinoud int mask = I32_bit | F32_bit;
391758ec341Sbjh21
392758ec341Sbjh21 return SetCPSR(mask, old_cpsr & mask);
3937d4a1addSreinoud }
3947d4a1addSreinoud
3957d4a1addSreinoud
3967d4a1addSreinoud u_int
397758ec341Sbjh21 enable_interrupts(u_int mask)
3987d4a1addSreinoud {
399758ec341Sbjh21
400758ec341Sbjh21 return SetCPSR(mask, 0);
4017d4a1addSreinoud }
4027d4a1addSreinoud #endif
4037d4a1addSreinoud
4047d4a1addSreinoud /*
4057d4a1addSreinoud * void disable_irq(int irq)
4067d4a1addSreinoud *
4077d4a1addSreinoud * Disables a specific irq. The irq is removed from the master irq mask
4087d4a1addSreinoud */
4097d4a1addSreinoud
4107d4a1addSreinoud void
disable_irq(int irq)411758ec341Sbjh21 disable_irq(int irq)
4127d4a1addSreinoud {
4137d4a1addSreinoud u_int oldirqstate;
4147d4a1addSreinoud
4157d4a1addSreinoud oldirqstate = disable_interrupts(I32_bit);
4167d4a1addSreinoud current_mask &= ~(1 << irq);
4177d4a1addSreinoud irq_setmasks();
4187d4a1addSreinoud restore_interrupts(oldirqstate);
4197d4a1addSreinoud }
4207d4a1addSreinoud
4217d4a1addSreinoud
4227d4a1addSreinoud /*
4237d4a1addSreinoud * void enable_irq(int irq)
4247d4a1addSreinoud *
4257d4a1addSreinoud * Enables a specific irq. The irq is added to the master irq mask
4267d4a1addSreinoud * This routine should be used with caution. A handler should already
4277d4a1addSreinoud * be installed.
4287d4a1addSreinoud */
4297d4a1addSreinoud
4307d4a1addSreinoud void
enable_irq(int irq)431758ec341Sbjh21 enable_irq(int irq)
4327d4a1addSreinoud {
4337d4a1addSreinoud u_int oldirqstate;
4347d4a1addSreinoud
4357d4a1addSreinoud oldirqstate = disable_interrupts(I32_bit);
4367d4a1addSreinoud current_mask |= (1 << irq);
4377d4a1addSreinoud irq_setmasks();
4387d4a1addSreinoud restore_interrupts(oldirqstate);
4397d4a1addSreinoud }
4407d4a1addSreinoud
4417d4a1addSreinoud
4427d4a1addSreinoud /*
4437d4a1addSreinoud * void stray_irqhandler(u_int mask)
4447d4a1addSreinoud *
4457d4a1addSreinoud * Handler for stray interrupts. This gets called if a handler cannot be
4467d4a1addSreinoud * found for an interrupt.
4477d4a1addSreinoud */
4487d4a1addSreinoud
4497d4a1addSreinoud void
stray_irqhandler(u_int mask)450758ec341Sbjh21 stray_irqhandler(u_int mask)
4517d4a1addSreinoud {
4527d4a1addSreinoud static u_int stray_irqs = 0;
4537d4a1addSreinoud
4547d4a1addSreinoud if (++stray_irqs <= 8)
4557d4a1addSreinoud log(LOG_ERR, "Stray interrupt %08x%s\n", mask,
4567d4a1addSreinoud stray_irqs >= 8 ? ": stopped logging" : "");
4577d4a1addSreinoud }
458