1*95e1ffb1Schristos/* $NetBSD: ixp425_a4x_io.S,v 1.2 2005/12/11 12:16:51 christos Exp $ */ 2fb2c5211Sscw 3fb2c5211Sscw/* 4fb2c5211Sscw * Copyright 2003 Wasabi Systems, Inc. 5fb2c5211Sscw * All rights reserved. 6fb2c5211Sscw * 7fb2c5211Sscw * Written by Steve C. Woodford for Wasabi Systems, Inc. 8fb2c5211Sscw * 9fb2c5211Sscw * Redistribution and use in source and binary forms, with or without 10fb2c5211Sscw * modification, are permitted provided that the following conditions 11fb2c5211Sscw * are met: 12fb2c5211Sscw * 1. Redistributions of source code must retain the above copyright 13fb2c5211Sscw * notice, this list of conditions and the following disclaimer. 14fb2c5211Sscw * 2. Redistributions in binary form must reproduce the above copyright 15fb2c5211Sscw * notice, this list of conditions and the following disclaimer in the 16fb2c5211Sscw * documentation and/or other materials provided with the distribution. 17fb2c5211Sscw * 3. All advertising materials mentioning features or use of this software 18fb2c5211Sscw * must display the following acknowledgement: 19fb2c5211Sscw * This product includes software developed for the NetBSD Project by 20fb2c5211Sscw * Wasabi Systems, Inc. 21fb2c5211Sscw * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22fb2c5211Sscw * or promote products derived from this software without specific prior 23fb2c5211Sscw * written permission. 24fb2c5211Sscw * 25fb2c5211Sscw * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26fb2c5211Sscw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27fb2c5211Sscw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28fb2c5211Sscw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29fb2c5211Sscw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30fb2c5211Sscw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31fb2c5211Sscw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32fb2c5211Sscw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33fb2c5211Sscw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34fb2c5211Sscw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35fb2c5211Sscw * POSSIBILITY OF SUCH DAMAGE. 36fb2c5211Sscw */ 37fb2c5211Sscw 38fb2c5211Sscw/* 39fb2c5211Sscw * There are simple bus space functions for IO registers mapped at 40fb2c5211Sscw * 32-bit aligned positions. offset is multiplied by 4. 41fb2c5211Sscw * 42fb2c5211Sscw * Based loosely on pxa2x0_a2x_io.S 43fb2c5211Sscw */ 44fb2c5211Sscw 45fb2c5211Sscw#include <machine/asm.h> 46fb2c5211Sscw 47fb2c5211Sscw/* 48fb2c5211Sscw * bus_space I/O functions with offset*4 49fb2c5211Sscw */ 50fb2c5211Sscw 51fb2c5211Sscw/* 52fb2c5211Sscw * Read single 53fb2c5211Sscw */ 54fb2c5211SscwENTRY(a4x_bs_r_1) 55fb2c5211Sscw ldr r0, [r1, r2, LSL #2] 56fb2c5211Sscw and r0, r0, #0xff 57fb2c5211Sscw mov pc, lr 58fb2c5211Sscw 59fb2c5211SscwENTRY(a4x_bs_r_2) 60fb2c5211Sscw ldr r0, [r1, r2, LSL #2] 61fb2c5211Sscw mov r1, #0xff 62fb2c5211Sscw orr r1, r1, r1, lsl #8 63fb2c5211Sscw and r0, r0, r1 64fb2c5211Sscw mov pc, lr 65fb2c5211Sscw 66fb2c5211SscwENTRY(a4x_bs_r_4) 67fb2c5211Sscw ldr r0, [r1, r2, LSL #2] 68fb2c5211Sscw mov pc, lr 69fb2c5211Sscw 70fb2c5211Sscw/* 71fb2c5211Sscw * Write single 72fb2c5211Sscw */ 73fb2c5211SscwENTRY(a4x_bs_w_1) 74fb2c5211Sscw and r3, r3, #0xff 75fb2c5211Sscw str r3, [r1, r2, LSL #2] 76fb2c5211Sscw mov pc, lr 77fb2c5211Sscw 78fb2c5211SscwENTRY(a4x_bs_w_2) 79fb2c5211Sscw mov r0, #0xff 80fb2c5211Sscw orr r0, r0, r0, lsl #8 81fb2c5211Sscw and r3, r3, r0 82fb2c5211Sscw str r3, [r1, r2, LSL #2] 83fb2c5211Sscw mov pc, lr 84fb2c5211Sscw 85fb2c5211SscwENTRY(a4x_bs_w_4) 86fb2c5211Sscw str r3, [r1, r2, LSL #2] 87fb2c5211Sscw mov pc, lr 88fb2c5211Sscw 89fb2c5211Sscw/* 90fb2c5211Sscw * Read multiple 91fb2c5211Sscw */ 92fb2c5211SscwENTRY(a4x_bs_rm_1) 93fb2c5211Sscw add r0, r1, r2, lsl #2 94fb2c5211Sscw ldr r2, [sp, #0] 95fb2c5211Sscw mov r1, r3 96fb2c5211Sscw teq r2, #0 97fb2c5211Sscw moveq pc, lr 98fb2c5211Sscw1: ldr r3, [r0] 99fb2c5211Sscw subs r2, r2, #1 100fb2c5211Sscw strb r3, [r1], #1 101fb2c5211Sscw bne 1b 102fb2c5211Sscw mov pc, lr 103fb2c5211Sscw 104fb2c5211SscwENTRY(a4x_bs_rm_2) 105fb2c5211Sscw add r0, r1, r2, lsl #2 106fb2c5211Sscw ldr r2, [sp, #0] 107fb2c5211Sscw mov r1, r3 108fb2c5211Sscw teq r2, #0 109fb2c5211Sscw moveq pc, lr 110fb2c5211Sscw1: ldr r3, [r0] 111fb2c5211Sscw subs r2, r2, #1 112fb2c5211Sscw strh r3, [r1], #2 113fb2c5211Sscw bne 1b 114fb2c5211Sscw mov pc, lr 115fb2c5211Sscw 116fb2c5211Sscw/* 117fb2c5211Sscw * Write multiple 118fb2c5211Sscw */ 119fb2c5211SscwENTRY(a4x_bs_wm_1) 120fb2c5211Sscw add r0, r1, r2, lsl #2 121fb2c5211Sscw ldr r2, [sp, #0] 122fb2c5211Sscw mov r1, r3 123fb2c5211Sscw teq r2, #0 124fb2c5211Sscw moveq pc, lr 125fb2c5211Sscw1: ldrb r3, [r1], #1 126fb2c5211Sscw subs r2, r2, #1 127fb2c5211Sscw str r3, [r0] 128fb2c5211Sscw bne 1b 129fb2c5211Sscw mov pc, lr 130fb2c5211Sscw 131fb2c5211SscwENTRY(a4x_bs_wm_2) 132fb2c5211Sscw add r0, r1, r2, lsl #2 133fb2c5211Sscw ldr r2, [sp, #0] 134fb2c5211Sscw mov r1, r3 135fb2c5211Sscw teq r2, #0 136fb2c5211Sscw moveq pc, lr 137fb2c5211Sscw1: ldrh r3, [r1], #2 138fb2c5211Sscw subs r2, r2, #1 139fb2c5211Sscw str r3, [r0] 140fb2c5211Sscw bne 1b 141fb2c5211Sscw mov pc, lr 142