1*95e1ffb1Schristos/* $NetBSD: ixp425_pci_asm.S,v 1.2 2005/12/11 12:16:51 christos Exp $ */ 2663ccee1Sichiro 3663ccee1Sichiro/* 4663ccee1Sichiro * Copyright (c) 2003 Wasabi Systems, Inc. 5663ccee1Sichiro * All rights reserved. 6663ccee1Sichiro * 7663ccee1Sichiro * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8663ccee1Sichiro * 9663ccee1Sichiro * Redistribution and use in source and binary forms, with or without 10663ccee1Sichiro * modification, are permitted provided that the following conditions 11663ccee1Sichiro * are met: 12663ccee1Sichiro * 1. Redistributions of source code must retain the above copyright 13663ccee1Sichiro * notice, this list of conditions and the following disclaimer. 14663ccee1Sichiro * 2. Redistributions in binary form must reproduce the above copyright 15663ccee1Sichiro * notice, this list of conditions and the following disclaimer in the 16663ccee1Sichiro * documentation and/or other materials provided with the distribution. 17663ccee1Sichiro * 3. All advertising materials mentioning features or use of this software 18663ccee1Sichiro * must display the following acknowledgement: 19663ccee1Sichiro * This product includes software developed for the NetBSD Project by 20663ccee1Sichiro * Wasabi Systems, Inc. 21663ccee1Sichiro * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22663ccee1Sichiro * or promote products derived from this software without specific prior 23663ccee1Sichiro * written permission. 24663ccee1Sichiro * 25663ccee1Sichiro * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26663ccee1Sichiro * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27663ccee1Sichiro * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28663ccee1Sichiro * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29663ccee1Sichiro * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30663ccee1Sichiro * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31663ccee1Sichiro * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32663ccee1Sichiro * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33663ccee1Sichiro * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34663ccee1Sichiro * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35663ccee1Sichiro * POSSIBILITY OF SUCH DAMAGE. 36663ccee1Sichiro */ 37663ccee1Sichiro 38663ccee1Sichiro#include <arm/asm.h> 39663ccee1Sichiro#include <arm/cpuconf.h> 40663ccee1Sichiro 41663ccee1Sichiro/* 42663ccee1Sichiro * Bus space functions for IXP425 PCI space access. We have to swizzle 43663ccee1Sichiro * the address for 1 and 2 byte accesses when in big-endian mode. 44663ccee1Sichiro */ 45663ccee1Sichiro 46663ccee1Sichiro/* 47663ccee1Sichiro * read single 48663ccee1Sichiro */ 49663ccee1Sichiro 50663ccee1SichiroENTRY(ixp425_pci_mem_bs_r_1) 51663ccee1Sichiro#ifdef __ARMEB__ 52663ccee1Sichiro add r1, r1, r2 53663ccee1Sichiro eor r1, r1, #0x3 54663ccee1Sichiro ldrb r0, [r1] 55663ccee1Sichiro#else 56663ccee1Sichiro ldrb r0, [r1, r2] 57663ccee1Sichiro#endif /* __ARMEB__ */ 58663ccee1Sichiro mov pc, lr 59663ccee1Sichiro 60663ccee1SichiroENTRY(ixp425_pci_mem_bs_r_2) 61663ccee1Sichiro#ifdef __ARMEB__ 62663ccee1Sichiro add r1, r1, r2 63663ccee1Sichiro eor r1, r1, #0x2 64663ccee1Sichiro ldrh r0, [r1] 65663ccee1Sichiro#else 66663ccee1Sichiro ldrh r0, [r1, r2] 67663ccee1Sichiro#endif /* __ARMEB__ */ 68663ccee1Sichiro mov pc, lr 69663ccee1Sichiro 70663ccee1SichiroENTRY(ixp425_pci_mem_bs_r_4) 71663ccee1Sichiro ldr r0, [r1, r2] 72663ccee1Sichiro mov pc, lr 73663ccee1Sichiro 74663ccee1Sichiro/* 75663ccee1Sichiro * write single 76663ccee1Sichiro */ 77663ccee1Sichiro 78663ccee1SichiroENTRY(ixp425_pci_mem_bs_w_1) 79663ccee1Sichiro#ifdef __ARMEB__ 80663ccee1Sichiro add r1, r1, r2 81663ccee1Sichiro eor r1, r1, #0x3 82663ccee1Sichiro strb r3, [r1] 83663ccee1Sichiro#else 84663ccee1Sichiro strb r3, [r1, r2] 85663ccee1Sichiro#endif /* __ARMEB__ */ 86663ccee1Sichiro mov pc, lr 87663ccee1Sichiro 88663ccee1SichiroENTRY(ixp425_pci_mem_bs_w_2) 89663ccee1Sichiro#ifdef __ARMEB__ 90663ccee1Sichiro add r1, r1, r2 91663ccee1Sichiro eor r1, r1, #0x2 92663ccee1Sichiro strh r3, [r1] 93663ccee1Sichiro#else 94663ccee1Sichiro strh r3, [r1, r2] 95663ccee1Sichiro#endif /* __ARMEB__ */ 96663ccee1Sichiro mov pc, lr 97663ccee1Sichiro 98663ccee1SichiroENTRY(ixp425_pci_mem_bs_w_4) 99663ccee1Sichiro str r3, [r1, r2] 100663ccee1Sichiro mov pc, lr 101