xref: /netbsd/sys/arch/mvmeppc/include/asm.h (revision 5d1e8b27)
1*5d1e8b27Swiz /*	$NetBSD: asm.h,v 1.2 2006/02/25 02:28:57 wiz Exp $	*/
24c447e53Sscw 
34c447e53Sscw #include <powerpc/asm.h>
44c447e53Sscw 
5*5d1e8b27Swiz #define	HID0_NOOPTI	(1 << 0)	/* No-op D-cache touch instructions */
64c447e53Sscw #define	HID0_BTCD	(1 << 1)
74c447e53Sscw #define	HID0_BHTE	(1 << 2)
84c447e53Sscw #define	HID0_FBIOB	(1 << 4)	/* Force branch indirect on bus */
94c447e53Sscw #define	HID0_SIED	(1 << 7)
104c447e53Sscw #define	HID0_DCFI	(1 << 10)	/* D-cache flash invalidate */
114c447e53Sscw #define	HID0_ICFI	(1 << 11)	/* I-cache flash invalidate */
124c447e53Sscw #define	HID0_DLOCK	(1 << 12)	/* D-cache lock */
134c447e53Sscw #define	HID0_ILOCK	(1 << 13)	/* I-cache lock */
144c447e53Sscw #define	HID0_DCE	(1 << 14)	/* D-cache enable */
154c447e53Sscw #define	HID0_ICE	(1 << 15)	/* I-cache enable */
164c447e53Sscw #define	HID0_NHR	(1 << 16)
174c447e53Sscw #define	HID0_RISEG	(1 << 19)
184c447e53Sscw #define	HID0_DPM	(1 << 20)	/* Dynamic power management enable */
194c447e53Sscw #define	HID0_SLEEP	(1 << 21)	/* Sleep mode enable */
204c447e53Sscw #define	HID0_NAP	(1 << 22)	/* Nap mode enable */
214c447e53Sscw #define	HID0_DOZE	(1 << 23)	/* Doze mode enable */
224c447e53Sscw #define	HID0_PAR	(1 << 24)	/* Disable precharge of #ARTRY */
234c447e53Sscw #define	HID0_ECLK	(1 << 25)	/* CLK_OUT output enable */
244c447e53Sscw #define	HID0_EICE	(1 << 26)	/* Enable ICE pipeline tracking */
254c447e53Sscw #define	HID0_BCLK	(1 << 27)	/* CLK_OUT output enable */
264c447e53Sscw #define	HID0_EBD	(1 << 28)	/* Enable 60x-bus data parity checks */
274c447e53Sscw #define	HID0_EBA	(1 << 29)	/* Enable 60x-bus addr parity checks */
284c447e53Sscw #define	HID0_EMCP	(1 << 31)	/* Enable Machine Checks */
294c447e53Sscw 
304c447e53Sscw #define	LDCONST(r,v)	lis r,v@ha ; addi r,r,v@l
314c447e53Sscw #define	LDVAR(r,a)	lis r,a@ha ; lwz r,a@l(r)
32