xref: /netbsd/sys/arch/newsmips/dev/zs_hb.c (revision 764da5a4)
1 /*	$NetBSD: zs_hb.c,v 1.15 2003/05/10 09:46:25 tsutsui Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Zilog Z8530 Dual UART driver (machine-dependent part)
41  *
42  * Runs two serial lines per chip using slave drivers.
43  * Plain tty/async lines use the zs_async slave.
44  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45  */
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/device.h>
50 #include <sys/tty.h>
51 #include <sys/conf.h>
52 
53 #include <machine/adrsmap.h>
54 #include <machine/cpu.h>
55 #include <machine/z8530var.h>
56 
57 #include <dev/cons.h>
58 #include <dev/ic/z8530reg.h>
59 
60 #include <newsmips/dev/hbvar.h>
61 
62 #include "zsc.h"	/* NZSC */
63 #define NZS NZSC
64 
65 /* Make life easier for the initialized arrays here. */
66 #if NZS < 2
67 #undef  NZS
68 #define NZS 2
69 #endif
70 
71 #define ZSCFLAG_EX	0x01	/* expansion board */
72 
73 /*
74  * The news3400 provides a 4.9152 MHz clock to the ZS chips.
75  */
76 #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
77 #define PCLK_EX	(9600 * 384)
78 
79 /*
80  * Define interrupt levels.
81  */
82 #define ZSHARD_PRI 64
83 
84 #define ZS_DELAY() {(void)*(volatile char *)INTEN1; delay(2);}
85 
86 /* The layout of this is hardware-dependent (padding, order). */
87 struct zschan {
88 	volatile u_char	zc_csr;		/* ctrl,status, and indirect access */
89 	volatile u_char	zc_data;	/* data */
90 };
91 struct zsdevice {
92 	/* Yes, they are backwards. */
93 	struct	zschan zs_chan_b;
94 	struct	zschan zs_chan_a;
95 };
96 
97 extern int zs_def_cflag;
98 
99 static struct zsdevice *zsaddr[NZS];
100 
101 /* Flags from cninit() */
102 static int zs_hwflags[NZS][2];
103 
104 /* Default speed for all channels */
105 static int zs_defspeed = 9600;
106 
107 static u_char zs_init_reg[16] = {
108 	0,	/* 0: CMD (reset, etc.) */
109 	0,	/* 1: No interrupts yet. */
110 	ZSHARD_PRI,	/* IVECT */
111 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
112 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
113 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
114 	0,	/* 6: TXSYNC/SYNCLO */
115 	0,	/* 7: RXSYNC/SYNCHI */
116 	0,	/* 8: alias for data port */
117 	ZSWR9_MASTER_IE,
118 	0,	/*10: Misc. TX/RX control bits */
119 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
120 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
121 	0,			/*13: BAUDHI (default=9600) */
122 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
123 	ZSWR15_BREAK_IE,
124 };
125 
126 static struct zschan * zs_get_chan_addr __P((int, int));
127 static void zs_hb_delay __P((void));
128 static int zshard_hb __P((void *));
129 static int zs_getc __P((void *));
130 static void zs_putc __P((void *, int));
131 
132 struct zschan *
133 zs_get_chan_addr(zs_unit, channel)
134 	int zs_unit, channel;
135 {
136 	struct zsdevice *addr;
137 	struct zschan *zc;
138 
139 	if (zs_unit >= NZS)
140 		return NULL;
141 	addr = zsaddr[zs_unit];
142 	if (addr == NULL)
143 		return NULL;
144 	if (channel == 0) {
145 		zc = &addr->zs_chan_a;
146 	} else {
147 		zc = &addr->zs_chan_b;
148 	}
149 	return (zc);
150 }
151 
152 static void
153 zs_hb_delay()
154 {
155 
156 	ZS_DELAY();
157 }
158 
159 /****************************************************************
160  * Autoconfig
161  ****************************************************************/
162 
163 /* Definition of the driver for autoconfig. */
164 int zs_hb_match __P((struct device *, struct cfdata *, void *));
165 void zs_hb_attach __P((struct device *, struct device *, void *));
166 
167 CFATTACH_DECL(zsc_hb, sizeof(struct zsc_softc),
168     zs_hb_match, zs_hb_attach, NULL, NULL);
169 
170 /*
171  * Is the zs chip present?
172  */
173 int
174 zs_hb_match(parent, cf, aux)
175 	struct device *parent;
176 	struct cfdata *cf;
177 	void *aux;
178 {
179 	struct hb_attach_args *ha = aux;
180 
181 	if (strcmp(ha->ha_name, "zsc"))
182 		return 0;
183 
184 	/* This returns -1 on a fault (bus error). */
185 	if (hb_badaddr((char *)ha->ha_addr, 1))
186 		return 0;
187 
188 	return 1;
189 }
190 
191 /*
192  * Attach a found zs.
193  *
194  * Match slave number to zs unit number, so that misconfiguration will
195  * not set up the keyboard as ttya, etc.
196  */
197 void
198 zs_hb_attach(parent, self, aux)
199 	struct device *parent;
200 	struct device *self;
201 	void *aux;
202 {
203 	struct zsc_softc *zsc = (void *)self;
204 	struct hb_attach_args *ha = aux;
205 	struct zsc_attach_args zsc_args;
206 	volatile struct zschan *zc;
207 	struct zs_chanstate *cs;
208 	int s, zs_unit, channel, intlevel;
209 	static int didintr;
210 
211 	zs_unit = zsc->zsc_dev.dv_unit;
212 	intlevel = ha->ha_level;
213 	zsaddr[zs_unit] = (void *)ha->ha_addr;
214 
215 	if (intlevel == -1) {
216 #if 0
217 		printf(": interrupt level not configured\n");
218 		return;
219 #else
220 		printf(": interrupt level not configured; using");
221 		intlevel = 1;
222 #endif
223 	}
224 
225 	printf(" level %d\n", intlevel);
226 
227 	zs_delay = zs_hb_delay;
228 
229 	/*
230 	 * Initialize software state for each channel.
231 	 */
232 	for (channel = 0; channel < 2; channel++) {
233 		zsc_args.channel = channel;
234 		zsc_args.hwflags = zs_hwflags[zs_unit][channel];
235 		cs = &zsc->zsc_cs_store[channel];
236 		zsc->zsc_cs[channel] = cs;
237 
238 		simple_lock_init(&cs->cs_lock);
239 		cs->cs_channel = channel;
240 		cs->cs_private = NULL;
241 		cs->cs_ops = &zsops_null;
242 		if ((zsc->zsc_dev.dv_cfdata->cf_flags & ZSCFLAG_EX) == 0)
243 			cs->cs_brg_clk = PCLK / 16;
244 		else
245 			cs->cs_brg_clk = PCLK_EX / 16;
246 
247 		zc = zs_get_chan_addr(zs_unit, channel);
248 		cs->cs_reg_csr  = &zc->zc_csr;
249 		cs->cs_reg_data = &zc->zc_data;
250 
251 		bcopy(zs_init_reg, cs->cs_creg, 16);
252 		bcopy(zs_init_reg, cs->cs_preg, 16);
253 
254 		/* XXX: Get these from the EEPROM instead? */
255 		/* XXX: See the mvme167 code.  Better. */
256 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
257 			cs->cs_defspeed = zs_get_speed(cs);
258 		else
259 			cs->cs_defspeed = zs_defspeed;
260 		cs->cs_defcflag = zs_def_cflag;
261 
262 		/* Make these correspond to cs_defcflag (-crtscts) */
263 		cs->cs_rr0_dcd = ZSRR0_DCD;
264 		cs->cs_rr0_cts = 0;
265 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
266 		cs->cs_wr5_rts = 0;
267 
268 		/*
269 		 * Clear the master interrupt enable.
270 		 * The INTENA is common to both channels,
271 		 * so just do it on the A channel.
272 		 */
273 		if (channel == 0) {
274 			zs_write_reg(cs, 9, 0);
275 		}
276 
277 		/*
278 		 * Look for a child driver for this channel.
279 		 * The child attach will setup the hardware.
280 		 */
281 		if (!config_found(self, (void *)&zsc_args, zs_print)) {
282 			/* No sub-driver.  Just reset it. */
283 			u_char reset = (channel == 0) ?
284 				ZSWR9_A_RESET : ZSWR9_B_RESET;
285 			s = splhigh();
286 			zs_write_reg(cs, 9, reset);
287 			splx(s);
288 		}
289 	}
290 
291 	/*
292 	 * Now safe to install interrupt handlers.  Note the arguments
293 	 * to the interrupt handlers aren't used.  Note, we only do this
294 	 * once since both SCCs interrupt at the same level and vector.
295 	 */
296 	if (!didintr) {
297 		didintr = 1;
298 
299 		hb_intr_establish(intlevel, INTST1_SCC, IPL_SERIAL,
300 		    zshard_hb, NULL);
301 	}
302 	/* XXX; evcnt_attach() ? */
303 
304 	/*
305 	 * Set the master interrupt enable and interrupt vector.
306 	 * (common to both channels, do it on A)
307 	 */
308 	cs = zsc->zsc_cs[0];
309 	s = splhigh();
310 	/* interrupt vector */
311 	zs_write_reg(cs, 2, zs_init_reg[2]);
312 	/* master interrupt control (enable) */
313 	zs_write_reg(cs, 9, zs_init_reg[9]);
314 	splx(s);
315 }
316 
317 static int
318 zshard_hb(arg)
319 	void *arg;
320 {
321 	int rv;
322 
323 	(void) *(volatile u_char *)SCCVECT;
324 	rv = zshard(arg);
325 
326 	/* XXX news3400 sometimes losts zs interrupt */
327 	if (rv)
328 		zshard(arg);
329 
330 	return rv;
331 }
332 
333 /*
334  * Polled input char.
335  */
336 int
337 zs_getc(arg)
338 	void *arg;
339 {
340 	volatile struct zschan *zc = arg;
341 	int s, c, rr0;
342 
343 	s = splhigh();
344 	/* Wait for a character to arrive. */
345 	do {
346 		rr0 = zc->zc_csr;
347 		ZS_DELAY();
348 	} while ((rr0 & ZSRR0_RX_READY) == 0);
349 
350 	c = zc->zc_data;
351 	ZS_DELAY();
352 	splx(s);
353 
354 	/*
355 	 * This is used by the kd driver to read scan codes,
356 	 * so don't translate '\r' ==> '\n' here...
357 	 */
358 	return (c);
359 }
360 
361 /*
362  * Polled output char.
363  */
364 void
365 zs_putc(arg, c)
366 	void *arg;
367 	int c;
368 {
369 	volatile struct zschan *zc = arg;
370 	int s, rr0;
371 
372 	s = splhigh();
373 	/* Wait for transmitter to become ready. */
374 	do {
375 		rr0 = zc->zc_csr;
376 		ZS_DELAY();
377 	} while ((rr0 & ZSRR0_TX_READY) == 0);
378 
379 	zc->zc_data = c;
380 	ZS_DELAY();
381 	splx(s);
382 }
383 
384 /*****************************************************************/
385 
386 static void zscnprobe __P((struct consdev *));
387 static void zscninit __P((struct consdev *));
388 static int  zscngetc __P((dev_t));
389 static void zscnputc __P((dev_t, int));
390 
391 struct consdev consdev_zs = {
392 	zscnprobe,
393 	zscninit,
394 	zscngetc,
395 	zscnputc,
396 	nullcnpollc,
397 	NULL,
398 	NULL,
399 	NULL,
400 	NODEV,
401 	CN_DEAD
402 };
403 
404 static void
405 zscnprobe(cn)
406 	struct consdev *cn;
407 {
408 }
409 
410 static void
411 zscninit(cn)
412 	struct consdev *cn;
413 {
414 	extern const struct cdevsw zstty_cdevsw;
415 
416 	cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0);
417 	cn->cn_pri = CN_REMOTE;
418 	zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE;
419 }
420 
421 static int
422 zscngetc(dev)
423 	dev_t dev;
424 {
425 
426 	return zs_getc((void *)SCCPORT0A);
427 }
428 
429 static void
430 zscnputc(dev, c)
431 	dev_t dev;
432 	int c;
433 {
434 
435 	zs_putc((void *)SCCPORT0A, c);
436 }
437