1 /* $NetBSD: fpu_subr.c,v 1.4 2003/07/15 00:05:00 lukem Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)fpu_subr.c 8.1 (Berkeley) 6/11/93 45 */ 46 47 /* 48 * FPU subroutines. 49 */ 50 51 #include <sys/cdefs.h> 52 __KERNEL_RCSID(0, "$NetBSD: fpu_subr.c,v 1.4 2003/07/15 00:05:00 lukem Exp $"); 53 54 #include <sys/types.h> 55 #ifdef DIAGNOSTIC 56 #include <sys/systm.h> 57 #endif 58 59 #include <machine/reg.h> 60 #include <machine/instr.h> 61 62 #include <sparc/fpu/fpu_arith.h> 63 #include <sparc/fpu/fpu_emu.h> 64 #include <sparc/fpu/fpu_extern.h> 65 66 /* 67 * Shift the given number right rsh bits. Any bits that `fall off' will get 68 * shoved into the sticky field; we return the resulting sticky. Note that 69 * shifting NaNs is legal (this will never shift all bits out); a NaN's 70 * sticky field is ignored anyway. 71 */ 72 int 73 fpu_shr(register struct fpn *fp, register int rsh) 74 { 75 register u_int m0, m1, m2, m3, s; 76 register int lsh; 77 78 #ifdef DIAGNOSTIC 79 if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp))) 80 panic("fpu_rightshift 1"); 81 #endif 82 83 m0 = fp->fp_mant[0]; 84 m1 = fp->fp_mant[1]; 85 m2 = fp->fp_mant[2]; 86 m3 = fp->fp_mant[3]; 87 88 /* If shifting all the bits out, take a shortcut. */ 89 if (rsh >= FP_NMANT) { 90 #ifdef DIAGNOSTIC 91 if ((m0 | m1 | m2 | m3) == 0) 92 panic("fpu_rightshift 2"); 93 #endif 94 fp->fp_mant[0] = 0; 95 fp->fp_mant[1] = 0; 96 fp->fp_mant[2] = 0; 97 fp->fp_mant[3] = 0; 98 #ifdef notdef 99 if ((m0 | m1 | m2 | m3) == 0) 100 fp->fp_class = FPC_ZERO; 101 else 102 #endif 103 fp->fp_sticky = 1; 104 return (1); 105 } 106 107 /* Squish out full words. */ 108 s = fp->fp_sticky; 109 if (rsh >= 32 * 3) { 110 s |= m3 | m2 | m1; 111 m3 = m0, m2 = 0, m1 = 0, m0 = 0; 112 } else if (rsh >= 32 * 2) { 113 s |= m3 | m2; 114 m3 = m1, m2 = m0, m1 = 0, m0 = 0; 115 } else if (rsh >= 32) { 116 s |= m3; 117 m3 = m2, m2 = m1, m1 = m0, m0 = 0; 118 } 119 120 /* Handle any remaining partial word. */ 121 if ((rsh &= 31) != 0) { 122 lsh = 32 - rsh; 123 s |= m3 << lsh; 124 m3 = (m3 >> rsh) | (m2 << lsh); 125 m2 = (m2 >> rsh) | (m1 << lsh); 126 m1 = (m1 >> rsh) | (m0 << lsh); 127 m0 >>= rsh; 128 } 129 fp->fp_mant[0] = m0; 130 fp->fp_mant[1] = m1; 131 fp->fp_mant[2] = m2; 132 fp->fp_mant[3] = m3; 133 fp->fp_sticky = s; 134 return (s); 135 } 136 137 /* 138 * Force a number to be normal, i.e., make its fraction have all zero 139 * bits before FP_1, then FP_1, then all 1 bits. This is used for denorms 140 * and (sometimes) for intermediate results. 141 * 142 * Internally, this may use a `supernormal' -- a number whose fp_mant 143 * is greater than or equal to 2.0 -- so as a side effect you can hand it 144 * a supernormal and it will fix it (provided fp->fp_mant[3] == 0). 145 */ 146 void 147 fpu_norm(register struct fpn *fp) 148 { 149 register u_int m0, m1, m2, m3, top, sup, nrm; 150 register int lsh, rsh, exp; 151 152 exp = fp->fp_exp; 153 m0 = fp->fp_mant[0]; 154 m1 = fp->fp_mant[1]; 155 m2 = fp->fp_mant[2]; 156 m3 = fp->fp_mant[3]; 157 158 /* Handle severe subnormals with 32-bit moves. */ 159 if (m0 == 0) { 160 if (m1) 161 m0 = m1, m1 = m2, m2 = m3, m3 = 0, exp -= 32; 162 else if (m2) 163 m0 = m2, m1 = m3, m2 = 0, m3 = 0, exp -= 2 * 32; 164 else if (m3) 165 m0 = m3, m1 = 0, m2 = 0, m3 = 0, exp -= 3 * 32; 166 else { 167 fp->fp_class = FPC_ZERO; 168 return; 169 } 170 } 171 172 /* Now fix any supernormal or remaining subnormal. */ 173 nrm = FP_1; 174 sup = nrm << 1; 175 if (m0 >= sup) { 176 /* 177 * We have a supernormal number. We need to shift it right. 178 * We may assume m3==0. 179 */ 180 for (rsh = 1, top = m0 >> 1; top >= sup; rsh++) /* XXX slow */ 181 top >>= 1; 182 exp += rsh; 183 lsh = 32 - rsh; 184 m3 = m2 << lsh; 185 m2 = (m2 >> rsh) | (m1 << lsh); 186 m1 = (m1 >> rsh) | (m0 << lsh); 187 m0 = top; 188 } else if (m0 < nrm) { 189 /* 190 * We have a regular denorm (a subnormal number), and need 191 * to shift it left. 192 */ 193 for (lsh = 1, top = m0 << 1; top < nrm; lsh++) /* XXX slow */ 194 top <<= 1; 195 exp -= lsh; 196 rsh = 32 - lsh; 197 m0 = top | (m1 >> rsh); 198 m1 = (m1 << lsh) | (m2 >> rsh); 199 m2 = (m2 << lsh) | (m3 >> rsh); 200 m3 <<= lsh; 201 } 202 203 fp->fp_exp = exp; 204 fp->fp_mant[0] = m0; 205 fp->fp_mant[1] = m1; 206 fp->fp_mant[2] = m2; 207 fp->fp_mant[3] = m3; 208 } 209 210 /* 211 * Concoct a `fresh' Quiet NaN per Appendix N. 212 * As a side effect, we set NV (invalid) for the current exceptions. 213 */ 214 struct fpn * 215 fpu_newnan(register struct fpemu *fe) 216 { 217 register struct fpn *fp; 218 219 fe->fe_cx = FSR_NV; 220 fp = &fe->fe_f3; 221 fp->fp_class = FPC_QNAN; 222 fp->fp_sign = 0; 223 fp->fp_mant[0] = FP_1 - 1; 224 fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = ~0; 225 return (fp); 226 } 227