1*625dbd8fScgd /* $NetBSD: uhareg.h,v 1.8 2000/06/08 18:22:15 cgd Exp $ */ 2fbc0df0aSthorpej 3fbc0df0aSthorpej /*- 44399060eSthorpej * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5fbc0df0aSthorpej * All rights reserved. 6fbc0df0aSthorpej * 7fbc0df0aSthorpej * This code is derived from software contributed to The NetBSD Foundation 8a1ac6881Smycroft * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace 9a1ac6881Smycroft * Simulation Facility, NASA Ames Research Center. 10fbc0df0aSthorpej * 11fbc0df0aSthorpej * Redistribution and use in source and binary forms, with or without 12fbc0df0aSthorpej * modification, are permitted provided that the following conditions 13fbc0df0aSthorpej * are met: 14fbc0df0aSthorpej * 1. Redistributions of source code must retain the above copyright 15fbc0df0aSthorpej * notice, this list of conditions and the following disclaimer. 16fbc0df0aSthorpej * 2. Redistributions in binary form must reproduce the above copyright 17fbc0df0aSthorpej * notice, this list of conditions and the following disclaimer in the 18fbc0df0aSthorpej * documentation and/or other materials provided with the distribution. 19fbc0df0aSthorpej * 3. All advertising materials mentioning features or use of this software 20fbc0df0aSthorpej * must display the following acknowledgement: 21fbc0df0aSthorpej * This product includes software developed by the NetBSD 22fbc0df0aSthorpej * Foundation, Inc. and its contributors. 23fbc0df0aSthorpej * 4. Neither the name of The NetBSD Foundation nor the names of its 24fbc0df0aSthorpej * contributors may be used to endorse or promote products derived 25fbc0df0aSthorpej * from this software without specific prior written permission. 26fbc0df0aSthorpej * 27fbc0df0aSthorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28fbc0df0aSthorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29fbc0df0aSthorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30fbc0df0aSthorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31fbc0df0aSthorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32fbc0df0aSthorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33fbc0df0aSthorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34fbc0df0aSthorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35fbc0df0aSthorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36fbc0df0aSthorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37fbc0df0aSthorpej * POSSIBILITY OF SUCH DAMAGE. 38fbc0df0aSthorpej */ 3980110252Smycroft 4080110252Smycroft /* 4180110252Smycroft * Ported for use with the UltraStor 14f by Gary Close (gclose@wvnvms.wvnet.edu) 4280110252Smycroft * Slight fixes to timeouts to run with the 34F 4380110252Smycroft * Thanks to Julian Elischer for advice and help with this port. 4480110252Smycroft * 4580110252Smycroft * Originally written by Julian Elischer (julian@tfs.com) 4680110252Smycroft * for TRW Financial Systems for use under the MACH(2.5) operating system. 4780110252Smycroft * 4880110252Smycroft * TRW Financial Systems, in accordance with their agreement with Carnegie 4980110252Smycroft * Mellon University, makes this software available to CMU to distribute 5080110252Smycroft * or use in any manner that they see fit as long as this message is kept with 5180110252Smycroft * the software. For this reason TFS also grants any other persons or 5280110252Smycroft * organisations permission to use or modify this software. 5380110252Smycroft * 5480110252Smycroft * TFS supplies this software to be publicly redistributed 5580110252Smycroft * on the understanding that TFS is not responsible for the correct 5680110252Smycroft * functioning of this software in any circumstances. 5780110252Smycroft * 5880110252Smycroft * commenced: Sun Sep 27 18:14:01 PDT 1992 5980110252Smycroft * slight mod to make work with 34F as well: Wed Jun 2 18:05:48 WST 1993 6080110252Smycroft */ 6180110252Smycroft 6244bb2d98Smycroft typedef u_long physaddr; 6344bb2d98Smycroft typedef u_long physlen; 6444bb2d98Smycroft 6544bb2d98Smycroft /************************** board definitions *******************************/ 6644bb2d98Smycroft /* 6744bb2d98Smycroft * I/O Port Interface 6844bb2d98Smycroft */ 6944bb2d98Smycroft #define U14_LMASK 0x0000 /* local doorbell mask reg */ 7044bb2d98Smycroft #define U14_LINT 0x0001 /* local doorbell int/stat reg */ 7144bb2d98Smycroft #define U14_SMASK 0x0002 /* system doorbell mask reg */ 7244bb2d98Smycroft #define U14_SINT 0x0003 /* system doorbell int/stat reg */ 7344bb2d98Smycroft #define U14_ID 0x0004 /* product id reg (2 ports) */ 7444bb2d98Smycroft #define U14_CONFIG 0x0006 /* config reg (2 ports) */ 7544bb2d98Smycroft #define U14_OGMPTR 0x0008 /* outgoing mail ptr (4 ports) */ 7644bb2d98Smycroft #define U14_ICMPTR 0x000c /* incoming mail ptr (4 ports) */ 7744bb2d98Smycroft 7844bb2d98Smycroft #define U24_CONFIG 0x0005 /* config reg (3 ports) */ 7944bb2d98Smycroft #define U24_LMASK 0x000c /* local doorbell mask reg */ 8044bb2d98Smycroft #define U24_LINT 0x000d /* local doorbell int/stat reg */ 8144bb2d98Smycroft #define U24_SMASK 0x000e /* system doorbell mask reg */ 8244bb2d98Smycroft #define U24_SINT 0x000f /* system doorbell int/stat reg */ 8344bb2d98Smycroft #define U24_OGMCMD 0x0016 /* outgoing commands */ 8444bb2d98Smycroft #define U24_OGMPTR 0x0017 /* outgoing mail ptr (4 ports) */ 8544bb2d98Smycroft #define U24_ICMCMD 0x001b /* incoming commands */ 8644bb2d98Smycroft #define U24_ICMPTR 0x001c /* incoming mail ptr (4 ports) */ 8744bb2d98Smycroft 8844bb2d98Smycroft /* 8944bb2d98Smycroft * UHA_LMASK bits (read only) 9044bb2d98Smycroft */ 9144bb2d98Smycroft #define UHA_LDIE 0x80 /* local doorbell int enabled */ 9244bb2d98Smycroft #define UHA_SRSTE 0x40 /* soft reset enabled */ 9344bb2d98Smycroft #define UHA_ABORTEN 0x10 /* abort MSCP enabled */ 9444bb2d98Smycroft #define UHA_OGMINTEN 0x01 /* outgoing mail interrupt enabled */ 9544bb2d98Smycroft 9644bb2d98Smycroft /* 9744bb2d98Smycroft * UHA_LINT bits (read only) 9844bb2d98Smycroft */ 9944bb2d98Smycroft #define U14_LDIP 0x80 /* local doorbell int pending */ 10044bb2d98Smycroft #define U24_LDIP 0x02 /* local doorbell int pending */ 10144bb2d98Smycroft 10244bb2d98Smycroft /* 10344bb2d98Smycroft * UHA_LINT bits (write only) 10444bb2d98Smycroft */ 10544bb2d98Smycroft #define U14_OGMFULL 0x01 /* outgoing mailbox is full */ 10644bb2d98Smycroft #define U14_ABORT 0x10 /* abort MSCP */ 10744bb2d98Smycroft 10844bb2d98Smycroft #define U24_OGMFULL 0x02 /* outgoing mailbox is full */ 10944bb2d98Smycroft 11044bb2d98Smycroft #define UHA_SBRST 0x40 /* scsi bus reset */ 11144bb2d98Smycroft #define UHA_ADRST 0x80 /* adapter soft reset */ 11244bb2d98Smycroft #define UHA_ASRST 0xc0 /* adapter and scsi reset */ 11344bb2d98Smycroft 11444bb2d98Smycroft /* 11544bb2d98Smycroft * UHA_SMASK bits (read/write) 11644bb2d98Smycroft */ 11744bb2d98Smycroft #define UHA_ENSINT 0x80 /* enable system doorbell interrupt */ 11844bb2d98Smycroft #define UHA_EN_ABORT_COMPLETE 0x10 /* enable abort MSCP complete int */ 11944bb2d98Smycroft #define UHA_ENICM 0x01 /* enable ICM interrupt */ 12044bb2d98Smycroft 12144bb2d98Smycroft /* 12244bb2d98Smycroft * UHA_SINT bits (read) 12344bb2d98Smycroft */ 12444bb2d98Smycroft #define U14_SDIP 0x80 /* system doorbell int pending */ 12544bb2d98Smycroft #define U24_SDIP 0x02 /* system doorbell int pending */ 12644bb2d98Smycroft 12744bb2d98Smycroft #define UHA_ABORT_SUCC 0x10 /* abort MSCP successful */ 12844bb2d98Smycroft #define UHA_ABORT_FAIL 0x18 /* abort MSCP failed */ 12944bb2d98Smycroft 13044bb2d98Smycroft /* 13144bb2d98Smycroft * UHA_SINT bits (write) 13244bb2d98Smycroft */ 13344bb2d98Smycroft #define U14_ICM_ACK 0x01 /* acknowledge ICM and clear */ 13444bb2d98Smycroft #define U24_ICM_ACK 0x02 /* acknowledge ICM and clear */ 13544bb2d98Smycroft 13644bb2d98Smycroft #define UHA_ABORT_ACK 0x18 /* acknowledge status and clear */ 13744bb2d98Smycroft 13844bb2d98Smycroft /* 13944bb2d98Smycroft * U14_CONFIG bits (read only) 14044bb2d98Smycroft */ 14144bb2d98Smycroft #define U14_DMA_CH5 0x0000 /* DMA channel 5 */ 14244bb2d98Smycroft #define U14_DMA_CH6 0x4000 /* 6 */ 14344bb2d98Smycroft #define U14_DMA_CH7 0x8000 /* 7 */ 14444bb2d98Smycroft #define U14_DMA_MASK 0xc000 14544bb2d98Smycroft #define U14_IRQ15 0x0000 /* IRQ 15 */ 14644bb2d98Smycroft #define U14_IRQ14 0x1000 /* 14 */ 14744bb2d98Smycroft #define U14_IRQ11 0x2000 /* 11 */ 14844bb2d98Smycroft #define U14_IRQ10 0x3000 /* 10 */ 14944bb2d98Smycroft #define U14_IRQ_MASK 0x3000 15044bb2d98Smycroft #define U14_HOSTID_MASK 0x0007 15144bb2d98Smycroft 15244bb2d98Smycroft /* 15344bb2d98Smycroft * U24_CONFIG bits (read only) 15444bb2d98Smycroft */ 15544bb2d98Smycroft #define U24_MAGIC1 0x08 15644bb2d98Smycroft #define U24_IRQ15 0x10 15744bb2d98Smycroft #define U24_IRQ14 0x20 15844bb2d98Smycroft #define U24_IRQ11 0x40 15944bb2d98Smycroft #define U24_IRQ10 0x80 16044bb2d98Smycroft #define U24_IRQ_MASK 0xf0 16144bb2d98Smycroft 16244bb2d98Smycroft #define U24_MAGIC2 0x04 16344bb2d98Smycroft 16444bb2d98Smycroft #define U24_HOSTID_MASK 0x07 16544bb2d98Smycroft 16644bb2d98Smycroft /* 16744bb2d98Smycroft * EISA registers (offset from slot base) 16844bb2d98Smycroft */ 16944bb2d98Smycroft #define EISA_VENDOR 0x0c80 /* vendor ID (2 ports) */ 17044bb2d98Smycroft #define EISA_MODEL 0x0c82 /* model number (2 ports) */ 17144bb2d98Smycroft #define EISA_CONTROL 0x0c84 17244bb2d98Smycroft #define EISA_RESET 0x04 17344bb2d98Smycroft #define EISA_ERROR 0x02 17444bb2d98Smycroft #define EISA_ENABLE 0x01 17544bb2d98Smycroft 17644bb2d98Smycroft /* 17744bb2d98Smycroft * host_stat error codes 17844bb2d98Smycroft */ 17944bb2d98Smycroft #define UHA_NO_ERR 0x00 /* No error supposedly */ 18044bb2d98Smycroft #define UHA_SBUS_ABORT_ERR 0x84 /* scsi bus abort error */ 18144bb2d98Smycroft #define UHA_SBUS_TIMEOUT 0x91 /* scsi bus selection timeout */ 18244bb2d98Smycroft #define UHA_SBUS_OVER_UNDER 0x92 /* scsi bus over/underrun */ 18344bb2d98Smycroft #define UHA_BAD_SCSI_CMD 0x96 /* illegal scsi command */ 18444bb2d98Smycroft #define UHA_AUTO_SENSE_ERR 0x9b /* auto request sense err */ 18544bb2d98Smycroft #define UHA_SBUS_RES_ERR 0xa3 /* scsi bus reset error */ 18644bb2d98Smycroft #define UHA_BAD_SG_LIST 0xff /* invalid scatter gath list */ 18744bb2d98Smycroft 18844bb2d98Smycroft #define UHA_NSEG 33 /* number of dma segments supported */ 18944bb2d98Smycroft 19044bb2d98Smycroft struct uha_dma_seg { 19144bb2d98Smycroft physaddr seg_addr; 19244bb2d98Smycroft physlen seg_len; 19344bb2d98Smycroft }; 19444bb2d98Smycroft 19544bb2d98Smycroft #pragma pack(1) 19644bb2d98Smycroft struct uha_mscp { 19744bb2d98Smycroft u_char opcode:3; 19844bb2d98Smycroft #define UHA_HAC 0x01 /* host adapter command */ 19944bb2d98Smycroft #define UHA_TSP 0x02 /* target scsi pass through command */ 20044bb2d98Smycroft #define UHA_SDR 0x04 /* scsi device reset */ 20144bb2d98Smycroft u_char xdir:2; /* xfer direction */ 20244bb2d98Smycroft #define UHA_SDET 0x00 /* determined by scsi command */ 20344bb2d98Smycroft #define UHA_SDIN 0x01 /* scsi data in */ 20444bb2d98Smycroft #define UHA_SDOUT 0x02 /* scsi data out */ 20544bb2d98Smycroft #define UHA_NODATA 0x03 /* no data xfer */ 20644bb2d98Smycroft u_char dcn:1; /* disable disconnect for this command */ 20744bb2d98Smycroft u_char ca:1; /* cache control */ 20844bb2d98Smycroft u_char sgth:1; /* scatter gather flag */ 20944bb2d98Smycroft u_char target:3; 21044bb2d98Smycroft u_char chan:2; /* scsi channel (always 0 for 14f) */ 21144bb2d98Smycroft u_char lun:3; 21244bb2d98Smycroft physaddr data_addr; 21344bb2d98Smycroft physlen data_length; 21444bb2d98Smycroft physaddr link_addr; 21544bb2d98Smycroft u_char link_id; 21644bb2d98Smycroft u_char sg_num; /* number of scat gath segs */ 21744bb2d98Smycroft /*in s-g list if sg flag is */ 21844bb2d98Smycroft /*set. starts at 1, 8bytes per */ 21944bb2d98Smycroft u_char req_sense_length; 22044bb2d98Smycroft u_char scsi_cmd_length; 22144bb2d98Smycroft struct scsi_generic scsi_cmd; 22244bb2d98Smycroft u_char host_stat; 22344bb2d98Smycroft u_char target_stat; 22444bb2d98Smycroft physaddr sense_ptr; /* if 0 no auto sense */ 22544bb2d98Smycroft 22644bb2d98Smycroft struct uha_dma_seg uha_dma[UHA_NSEG]; 2276f3bab1fSbouyer struct scsipi_sense_data mscp_sense; 22844bb2d98Smycroft /*-----------------end of hardware supported fields----------------*/ 22944bb2d98Smycroft TAILQ_ENTRY(uha_mscp) chain; 23044bb2d98Smycroft struct uha_mscp *nexthash; 231fa0b1878Smycroft u_long hashkey; 2326f3bab1fSbouyer struct scsipi_xfer *xs; /* the scsipi_xfer for this cmd */ 23344bb2d98Smycroft int flags; 23444bb2d98Smycroft #define MSCP_ALLOC 0x01 23544bb2d98Smycroft #define MSCP_ABORT 0x02 23644bb2d98Smycroft int timeout; 237fbc0df0aSthorpej 238fbc0df0aSthorpej /* 239fbc0df0aSthorpej * This DMA map maps the buffer involved in the transfer. 240fbc0df0aSthorpej * It's contents are loaded into "uha_dma" above. 241fbc0df0aSthorpej */ 242fbc0df0aSthorpej bus_dmamap_t dmamap_xfer; 243fbc0df0aSthorpej 24444bb2d98Smycroft }; 245*625dbd8fScgd #pragma pack() 246